Port sampling circuit apparatus incorporated in a microcomputer

#1. Field of the Invention

#The present invention relates to a port sampling circuit apparatus performing sampling of input ports of a microcomputer based on conditions instructed by a central processing unit, and also relates to a microcomputer incorporating this port sampling circuit apparatus.

#2. Description of the Background Art

#The above and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention which is to be read in conjunction with the accompanying drawings, in which:

#FIG. 1 is a block diagram showing a schematic circuit arrangement of a microcomputer in accordance with a preferred embodiment of the present invention, which is preferably incorporated in a body ECU (i.e., electronic control unit) of an automotive vehicle;

#FIG. 2 is a block diagram showing registers and counters provided in a port sampling circuit in accordance with the preferred embodiment of the present invention;

#A preferred embodiment of the present invention will be explained with reference to attached drawings. FIG. 1 shows a circuit arrangement of a single chip microcomputer employable in a body ECU (i.e., electronic control unit) of an automotive vehicle. The microcomputer 1 includes a CPU 2 serving as main component and further includes peripheral components, such as a main oscillation circuit 3, a clock control circuit 4, a CR oscillation circuit 5, and a port sampling circuit 6.

#The main oscillation circuit 3 oscillates a quartz resonator 7 connected to the microcomputer 1 and supplies a clock signal (e.g., a machine clock or a system clock) for operating the CPU 2. The clock control circuit 4 outputs a clock stop signal to the main oscillation circuit 3 in response to a sleep/stop mode start command sent from CPU 2 via an address bus 8 and a data bus 9. The main oscillation circuit 3 stops outputting the clock signal when it receives the clock stop signal from the clock control circuit 4, thereby bringing CPU 2 (or the microcomputer 1 including CPU 2) into a sleep/stop mode.

#The sleep mode is automatically canceled when a predetermined time has counted by a timer incorporated in the clock control circuit 4. The stop mode is not canceled unless there is any wakeup factor, such as a later-described wakeup signal, happening outside. In both of the sleep mode and the stop mode, the operation of CPU 2 is brought into a low-power or less-activated condition so as to suppress electric power consumption in CPU 2.