System and method for address broadcast synchronization using a plurality of switches
AssigneeSun Microsystems, Inc.
InventorNaser H. Marmash
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AssigneeSun Microsystems, Inc.
InventorNaser H. Marmash
Estimating the term…
A system and method providing address broadcast synchronization using multiple switches. The system for concurrently providing addresses to a plurality of devices includes a first switch and a second switch. The first switch is coupled to receive address requests from a first plurality of sources. The first switch is configured to output the address request from the first plurality of sources. The second switch is coupled to receive address requests from a second plurality of sources. The second switch is configured to receive the address request from the first plurality of sources from the first switch. The second switch is further configured to delay the address request from the second plurality of sources prior to arbitrating between ones of the address request from the second plurality of sources and ones of the address request from the first party of sources received from the first switch. The second switch selects a selected address request, and the first and the second switch are further configured to broadcast concurrently a corresponding address to the selected address request. A method is also contemplated for concurrently providing addresses to a plurality of devices. A method of arbitrating in a first switch and a second switch between requests to the first switch and the second switch is disclosed where the arbitrated outcomes in both the first switch and the second switch are identical.
A system for concurrently providing addresses to a plurality of devices, comprising:
A system for concurrently providing addresses to a plurality of devices, comprising:
A method for concurrently providing addresses to a plurality of devices, the method comprising:
A system for concurrently providing addresses to a plurality of devices, the method comprising:
A method of arbitrating in a first switch and a second switch between requests to said first switch and said second switch, the method comprising:
Dependencies are inferred from the claim text.
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Non hierarchical topologies: one dimensional, e.g. linear array, ring
Computing and data processing
Term end not estimated
1. Field of the Invention
This invention relates to cache synchronization, and more particularly to address broadcast synchronization to a plurality of potentially responding devices.
2. Description of the Relevant Art
Other objects and advantages of the invention will become apparent upon reading the following detailed description and upon reference to the accompanying drawings in which:
FIG. 1 is a block diagram of an embodiment of a computer system including two switches that concurrently provide addresses to a plurality of devices;
FIG. 2 is a block diagram of an embodiment of the two switches shown in FIG. 1; and
While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that the drawings and detailed description thereto are not intended to limit the invention to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents and alternatives falling within the spirit and scope of the present invention as defined by the appended claims.
Similar features are designed herein using identical reference numerals. It is noted that the use of a reference numeral with an additional letter may designate a particular one of a group that may referenced as a while with the reference numeral by itself.
FIG. 1—Computer System Including Two Switches