Method and system for reconfigurable channel coding
AssigneeQST Holdings, LLC
InventorW. James Scheuermann
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AssigneeQST Holdings, LLC
InventorW. James Scheuermann
Estimating the term…
Aspects of a reconfigurable system for providing channel coding in a wireless communication device are described. The aspects include a plurality of computation elements for performing channel coding operations and memory for storing programs to direct each of the plurality of computation elements. A controller controls the plurality of computation elements and stored programs to achieve channel coding operations in accordance with a plurality of wireless communication standards. The plurality of computation elements include a data reordering element, a linear feedback shift register (LFSR) element, a convolutional encoder element, and a Viterbi decoder element.
A reconfigurable system for providing channel coding in a wireless communication device comprising:
A method for achieving channel coding in a wireless communication device that adapts to changes in wireless communication standards, the method comprising:
A reconfigurable system for providing channel coding in a wireless communication device comprising:
Dependencies are inferred from the claim text.
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Arrangements at the transmitter end: realisations of complexity reduction techniques, e.g. use of look-up tables
Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of…: circuits
Arrangements at the receiver end: maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
Systems characterized by the type of code used: convolutional codes
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The present invention relates, in general, to channel coding operations, and more particularly to reconfigurable channel coding operations to accommodate various wireless communication standards.
The use of cellular telephones in today's society has become widespread. While facilitating communication in a myriad of environments, the various existing and emerging wireless standards inhibit the ability to utilize a single device across the standards and platforms. The inability to have cross-platform coverage in a single device is due in large part to the inability to provide a hardware solution that can be adapted to varying standards.
For example, in terms of the channel coding operations that are necessary, existing and emerging wireless standards utilize myriad error mitigation techniques to operate in a hostile channel environment. Existing standards utilize two levels of coding plus block interleaving to address both single error and burst error phenomena. Group codes are used for the outer codes, and convolutional codes are used for the inner codes of the various concatenated coding schemes. No two standards employ the same combination. Additionally, certain standards employ encryption to offer a degree of privacy and security.
FIG. 1 is a block diagram illustrating an adaptive computing engine.
FIG. 2 is a block diagram illustrating a reconfigurable matrix, a plurality of computation units, and a plurality of computational elements of the adaptive computing engine.
FIG. 3 illustrates a block diagram of a channel coding computation unit in accordance with the present invention.
While the present invention is susceptible of embodiment in many different forms, there are shown in the drawings and will be described herein in detail specific embodiments thereof, with the understanding that the present disclosure is to be considered as an exemplification of the principles of the invention and is not intended to limit the invention to the specific embodiments illustrated.
The present invention provides aspects of a reconfigurable channel coder. In a preferred embodiment, the reconfigurable channel coder is provided as a reconfigurable matrix in accordance with the description in co-pending U.S. patent application Ser. No. ______, entitled “______ ”, assigned to the assignee of the present invention and incorporated by reference in its entirety herein. Portions of that description are reproduced herein for clarity of presentation of the aspects of the present invention.
Referring to FIG. 1, a block diagram illustrates an adaptive computing engine (“ACE”) 100, which is preferably embodied as an integrated circuit, or as a portion of an integrated circuit having other, additional components. In the preferred embodiment, and as discussed in greater detail below, the ACE 100 includes a controller 120, one or more reconfigurable matrices 150, such as matrices 150A through 150N as illustrated, a matrix interconnection network 110, and preferably also includes a memory 140.