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AssigneeInternational Business Machines Corporation
InventorsMassimo V. Fischetti, Steven E. Laux, Paul M. Solomon, Hon-Sum Philip Wong
Estimating the term…
A method (and structure) for an electronic chip having at least one layer of material for which a carrier mobility of a first carrier type is higher in a first crystal surface than in a second crystal surface and for which a carrier mobility of a second carrier type is higher in the second crystal surface than the first crystal surface includes a first device having at least one component fabricated on the first crystal surface of the material, wherein an activity of the component of the first device involves primarily the first carrier type, and a second device having at least one component fabricated on the second crystal surface of the material, wherein an activity of the component of the second device involves primarily the second carrier type.
An electronic chip having at least one layer of material for which a carrier mobility of a first carrier type is higher in a first crystal surface than in a second crystal surface and for which a carrier mobility of a second carrier type is higher in said second crystal surface than said first crystal surface, said electronic chip comprising:
An electronic chip comprising:
A method of fabricating on a wafer a first device having a carrier of a first type and a second device having a carrier of a second type, said first type carrier having a higher carrier mobility in a (111) crystal surface than on a (100) crystal surface, said second type carrier having a higher carrier mobility in said (100) crystal surface than on said (111) crystal surface, said method comprising;
Dependencies are inferred from the claim text.
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From the US filing history. Foreign family members aren’t listed.
Backward citations are indexed for grants only.
Fin field-effect transistors [FinFET]: having fin-shaped semiconductor bodies having non-rectangular cross-sections
Having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device:…
Characterised by the electrodes: characterised by the shapes, relative sizes or dispositions of the gate electrodes
Characterised by the active materials: group IV materials, e.g. germanium or silicon carbide
Term end not estimated
1. Field of the Invention
The present invention generally relates to fabricating an n-channel FET and p-channel FET on the same wafer in a manner that optimizes carrier transport for each device. Specifically, on a Germanium layer an n-channel FET is fabricated on the (111) surface in the <110> direction and a p-channel FET is fabricated on the (100) surface in the <110> direction.
2. Description of the Related Art
The foregoing and other objects, aspects and advantages will be better understood from the following detailed description of a preferred embodiment of the invention with reference to the drawings, in which:
FIG. 1 shows a calculated comparison of electron mobility in silicon and germanium inversion layers as a function of electron sheet density;
FIG. 2 shows a calculated drain-current versus drain-source voltage for a Si bulk n-MOSFET on the (100) surface and a similar Ge device on the (111) surface;
Referring now to the drawings, and more particularly to FIG. 1, by comparing the plot 1 with plots 2, 3, and 6, the electron mobility for the Ge inversion layer on the (111) surface is significantly higher than that of either Si or Ge on the (100) surface. Through rigorous device modeling and analyses, the inventors have generated this figure and, thereby, determined that germanium field effect transistor (Ge FET) has high current drive when the n-channel FET current transport is in the (111) surface in the <110> direction, and p-channel FET current transport is in the (100) surface in the <110> direction.
FIG. 2 shows a calculated drain-current versus drain-source voltage plot 20 for a 25 nm-channel-length Si bulk n-MOSFET on the (100) surface (plots 21) and a similar Ge device on the (111) surface (plots 22). The Ge device exhibits a significantly larger current and transconductance.
Therefore, in order to maximize the carrier transport benefits, it is necessary to choose not only the material but also the proper crystal orientation and direction along which carrier transport occurs. This invention teaches choosing a preferred crystal orientation and direction to optimize carrier transport.