Superjunction LDMOST using an insulator substrate for power integrated circuits

#This invention relates in general to a superjunction lateral double diffused metal oxide semiconductor field effect transistor (SJ-LDMOST) device fabricated on an insulator substrate. More specifically, the invention provides a device having improved on-state, off-state, and switching characteristics of lateral power devices for power integrated circuits applications.

#The performance of power integrated circuits (PICs) relies heavily on the on-state and off-state characteristics of a family of lateral power metal oxide semiconductor field effect transistors (MOSFETs), termed lateral double diffused MOSFETs (LDMOSTs), that utilize the reduced surface field technique (RESURF) to achieve high breakdown voltage while maintaining low on-resistance. For a detailed description of RESURF lateral device technology refer to J. A. Appels and H. M. J. Vaes, “High Voltage Thin Layer Devices (RESURF Devices)”, IEEE International Electron Device Meeting (IEDM), Dig. Tech Papers, pp. 238-241, 1979; incorporated herein by reference. The cross-section of a RESURF LDMOST device 10 implemented in a bulk p− type substrate 12 is shown in FIG. 1. The device 10 is typically fabricated on a thin epitaxial layer 14 to enhance the vertical depletion of the drift region 16. The device 10 further includes a source electrode 18, a drain electrode 20, a gate electrode 22, a polysilicon gate 24, a gate oxide layer 26, a field oxide layer 28, an n+ type source contact region 30, an n+ type drain contact region 32, and a p+ layer 34. Electrical isolation between adjacent devices is achieved by junction isolation (JI) where a reverse bias is applied to the p+ layer 34 at the source electrode 18.

#In RESURF LDMOST devices, the specific on-resistance increases with the breakdown voltage due to the increase of the low doped drift region length LD. Optimum breakdown voltage is achieved provided that the product of the doping concentration ND and the thickness of the epitaxial layer, tepi, is in the order of 1 to 2×1012 cm−2 (known as the RESURF condition) which puts a limit on the upper bound of the doping concentration in the drift region and hence the minimum achievable specific on-resistance. Nevertheless breakdown voltages up to 1200V have been achieved using the RESURF technique and modifications of the technique such as a double RESURF device 36 structure, which includes a p− region 38 in the surface of the n− drift region 16, as shown in FIG. 2. For a detailed description of double RESURF technology, see J. S. Ajit, D. Kinzer and M. Ranjan,” 1200V High-Side Lateral MOSFET in Junction-Isolated Power IC Technology Using Two Field Reduction Layers”, Proceedings of the 5th International Symposium on Power Semiconductor Devices and ICs (ISPSD), Proceedings, pp. 230-235, 1993; incorporated herein by reference.

#The invention will now be described with reference to certain preferred embodiments thereof and the accompanying drawings, wherein:

#FIG. 1 is a cross-section of a RESURF LDMOST;

#FIG. 2 is a cross-section of a double RESURF LDMOST;

#In related art RESURF LDMOST devices implemented in SOI substrate, the existence of bottom silicon layer is essential since it acts as a back gate and results in depleting the drift region vertically which is requited to achieve the RESURF condition (two perpendicular depletion edges merge and reinforce each other), however, in SJ lateral devices this bottom silicon layer does not serve any useful function (other than providing a mechanical support), on the contrary, it causes charge imbalance.

#For ideal SJ operation, the charge in the n and p pillars should be mirror image of each other under reverse bias and this symmetry should be maintained as the reverse bias increases. This requires that when the structure is under reverse bias the n-pillar is depleted by the two neighboring p-pillars only and similarly the p-pillar is depleted by the two neighboring n-pillars only with the depletion edges spreads outward and lies in a plane parallel to the physical SJs planes as in the case of SJ-VDMOST.

#To achieve the ideal SJ operation, the substrate-assisted-depletion effect must be eliminated. This means that the entire LDMOST including the SJ drift region must be terminated at the bottom by a perfect insulator. The insulator under the SJ drift region must not participate in the SJ depletion action.