Capacitor for semiconductor memory device and method of manufacturing the same
AssigneeHyundai Electronics Industries Co., Ltd.
InventorsKee Jeung Lee, Dong Jun Kim
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Abstract
Disclosed are a capacitor for semiconductor devices capable of increasing storage capacitance and preventing leakage current, and method of manufacturing the same. The capacitor for semiconductor memory devices according to the present invention includes: a lower electrode; a dielectric layer formed on the lower electrode; and an upper electrode formed on the upper portion of the dielectric layer, wherein the dielectric layer is a crystalline TaxOyNz layer, and the total of x, y, and z in the crystalline TaxOyNz layer is 1, and y is 0.3 to 0.5, and z is 0.1 to 0.3.
Claims24
A capacitor for semiconductor memory devices comprising:
- a lower electrode;
- a dielectric layer formed on the lower electrode;
- and
- an upper electrode formed on the upper portion of the dielectric layer, wherein the dielectric layer is a crystalline TaxOyNz layer, and the total of x, y, and z in the crystalline TaxOyNz layer is 1, and y is 0.3 to 0.5, and z is 0.1 to 0.3.
A method of manufacturing a capacitor on a semiconductor substrate, comprising the steps of:
- forming a lower electrode on the semiconductor substrate;
- depositing an amorphous TaxOyNz layer as a dielectric layer on the lower electrode;
- crystallizing the amorphous TaxOyNz layer;
- and
- forming an upper electrode on the crystalline TaxOyN2 layer, wherein the total of x, y and z in the TaxOyNz layer is 1, and y is 0.3 to 0.5, and z is 0.1 to 0.3.
A method of manufacturing a capacitor on a semiconductor substrate, comprising steps of:
- forming a lower electrode on the semiconductor substrate;
- surface-treating to prevent a natural oxide layer generation on the surface of the lower electrode;
- depositing an amorphous TaxOyNz layer as a dielectric layer on the lower electrode;
- crystallizing the amorphous TaxOyNz layer;
- and
- forming an upper electrode on the crystalline TaxOyN2 layer,
- wherein the total of x, y and z in the TaxOyNz layer is 1, y is 0.3 to 0.5, and z is 0.1 to 0.3, and the amorphous TaxOyNz layer is obtained by supplying Ta chemical vapor obtained from a precursor, O2 gas and NH3 gas with pressure of 0.1 to 100 Torr at temperature of 300 to 600° C. in an LPCVD chamber and by a surface chemical reaction thereof.
The method according to claim 25, wherein in the step of crystallizing the TaxOyNz layer is conducted such that a TaxOyNz layer deposited resultant is annealed at an atmosphere of oxygen containing gas at temperature of 600 to 950° C.
Dependencies are inferred from the claim text.