Method of supporting a substrate film

#1. Field of the Invention

#The present invention relates generally to the handling of semiconductor chips and, specifically, to a carrier adapted for supporting a substrate film during the assembly and bonding process.

#2. Background

#FIG. 1 is a schematic exploded perspective view of one embodiment of a ball grid array (BGA) chip package and a printed circuit board (PCB);

#FIG. 2 is a partially exploded perspective view of a substrate film, carrier and lead-over-chip (LOC) die assembly in accordance with one embodiment of the present invention;

#FIG. 3 is a top plan view of the substrate film of FIG. 2;

#FIG. 1 schematically illustrates a ball grid array (BGA) chip package 10 and a printed circuit board (PCB) 12. The BGA package 10 serves as an encapsulating device for a die or chip and permits electrical access to the die via solder or electrode bumps 14. The PCB 12 includes a pattern of pads 16 which are arranged in alignment with the BGA solder bumps 14. This allows the BGA chip package 10 to be connected to the PCB 12. Of course, other chip packaging types may also be used, for example, pin grid arrays (PGA), dual in-line packages (DIP), and the like. These packaging types can be connected to compatible connectors on a PCB or other external circuitry.

#In accordance with one embodiment, FIG. 2 is a representation of a lead-over-chip (LOC) assembly 17 and generally shows a substrate film 18, a film carrier or structure 20 and a semiconductor die or chip 22. The substrate film 18 includes a plurality of substrate units 24, as discussed in greater detail below, with each unit 24 being interfaceable with an individual die 22. The die 22 includes a plurality of bonding pads 28 which are in electrical contact with the integrated circuits formed on the die 22. During assembly, the die 22 is adhered to the substrate unit 24 and the bonding pads 28 are electrically contacted to traces 26 formed on or in the substrate unit 24 through die lead wires (not shown). In turn, the LOC die-substrate assembly 17 is separated from the substrate film 18 and packaged, for example, in the BGA chip package 10 (FIG. 1) with the substrate electrical traces 26 in electrical contact with the solder bumps 14 (FIG. 1). This permits the die 22 to be electrically interfaced with external circuitry, for example, the PCB 12 (FIG. 1). The LOC die-substrate assembly 17 can also be packaged in other forms, for example and as indicated above, using pin grid arrays (PGA), dual in-line packages (DIP), and the like.

#In general, the substrate film carrier 20 (FIG. 2) may be used in connection with various types of die-substrate assemblies to provide rigidity to the substrate film 18 (FIG. 2) during handling. In one embodiment, the substrate film carrier 20 is used in conjunction with a lead-under-chip (LUC). The structure of such LUC assemblies is well known in the art, and hence will not be discussed in detail herein.