Semiconductor module
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsHiroto Tokutome, Takuya Ariki
Life of this patent
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Abstract
A plurality of electrical wires are provided on a rear surface of a semiconductor module substrate having a structure that it is possible to mount a repair chip having a long lead and a repair chip having a normal lead in an overlaying manner and that it is possible to provide either repair chip or repair chip, which correspond to a plurality of bare chips, respectively. Thereby, it is possible to obtain a semiconductor module capable of repairing in a case where any bare chip becomes defective or even in a case where any combination of bare chips becomes defective.
Claims8
A semiconductor module comprising:
- a semiconductor module substrate;
- a plurality of bare chips mounted on a main surface of the semiconductor module substrate;
- and
- a mold resin for covering said plurality of bare chips together with the main surface of said semiconductor module substrate, wherein
- said semiconductor module substrate includes:
- a plurality of repair chip mounting regions provided outside of said mold resin to which repair chips having input/output terminals and being usable in place of said plurality of bare chips, respectively, can be mounted;
- and
- a plurality of electrical wires which, in the case that any of said plurality of bare chips is detected as being defective and a repair chip is mounted on any of said plurality of repair chip mounting regions, are connected to said input/output terminals of the mounted repair chip so that an electrical signal that have been inputted to or outputted from said bare chip that has been detected as being defective is inputted to or outputted from said mounted repair chip via the input/output terminals, and
- said plurality of electrical wires are formed so as to be connectable to said input/output terminal of said repair chip that is used in place of an arbitrary bare chip selected from among said plurality of bare chips or to said respective input/output terminals of said repair chips that are used in place of bare chips, respectively, making up an arbitrary combination selected from among said plurality of bare chips.
Dependencies are inferred from the claim text.