Circuit configuration for converting logic signal levels
AssigneeInfineon Technologies AG
InventorsAndre Schafer, Joachim Schnabel
Life of this patent
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Abstract
A circuit configuration for converting logic signal levels has two level converters, to which an input signal to be converted is fed complementarily. The level converters generate a rising or falling edge with a different gradient. The output signals of the level converters are combined in a logic combination element. The logic combination element drives a togglable storage element, which provides the level-converted output signal. The duty ratio of the input signal is not changed during the level conversion, independently of production-dictated variations in the component parameters.
Claims9
A circuit configuration for converting logic signal levels, comprising:
- an input terminal for receiving an input signal to be converted;
- level converters, including a first level converter and a second level converter each having an input receiving the input signal in a complementarily fashion with respect to each other, each of said level converters further containing:
- an output;
- and
- two current paths, including a first current path and a second current path, said current paths each having two series-connected transistors of complementary conductivity types and said transistors having control terminals, said transistors of a same conductivity type of different one of said current paths being controlled complementarily with respect to one another and said transistors of a respective same one of said current paths being controlled complementarily with respect to one another;
- a logic combination element having an output and inputs coupled to said output of each of said level converters;
- a togglable storage element having an output and an input connected to said output of said logic combination element;
- and
- an output terminal connected to said output of said togglable storage element.
A memory configuration, comprising:
- a memory cell;
- a terminal for providing a data signal outside the memory configuration;
- an output driver connected to said terminal;
- a circuit configuration for converting logic signal levels connected between said memory cell and said output driver, said circuit configuration containing:
- an input terminal couple to said memory cell for receiving an input signal to be converted from said memory cell;
- level converters, including a first level converter and a second level converter each having an input receiving the input signal in a complementarily fashion with respect to each other, each of said level converters further including:
- an output;
- and
- two current paths, including a first current path and a second current path, said current paths each having two series-connected transistors of complementary conductivity types and said transistors having control terminals, said transistors of a same conductivity type of different ones of said current paths being controlled complementarily with respect to one another and said transistors of a respective same one of said current signal paths being controlled complementarily with respect to one another;
- a logic combination element having an output and inputs coupled to said output of each of said level converters;
- a togglable storage element having an output and an input connected to said output of the logic combination element;
- and
- an output terminal connected between aid output of said togglable storage element and said output driver.
Dependencies are inferred from the claim text.