Methods for forming wordlines, transistor gates, and conductive interonnects, and wordline, transistor gate, and conductive interconnect structures

A method of forming a conductive line comprising the following steps:

• forming a polysilicon layer;
• forming a silicide layer against the layer of polysilicon;
• providing a conductivity-enhancing impurity within the silicide layer;
• and
• after providing the conductivity-enhancing impurity within the silicide layer, subjecting the silicide layer to a processing step of over 850° C. for at least 10 seconds.

A method of forming a conductive line comprising the following steps:

• forming a polysilicon layer;
• forming a silicide layer against the layer of polysilicon;
• providing a conductivity-enhancing impurity within the silicide layer;
• and
• subjecting the silicide layer to a processing step of over 850° C. for at least 10 seconds while exposing the silicide layer to an oxygencomprising atmosphere.

A programmable-read-only-memory device comprising:

• a first dielectric layer over a substrate;
• a floating gate over the first dielectric layer;
• a second dielectric layer over the floating gate;
• a conductive line over the second dielectric layer;
• and
• a metal-silicide layer over the conductive line, the metal-silicide layer comprising a Group III dopant or a Group V dopant.