Semiconductor package including a double-faced semiconductor chip having integrated circuitry on both sides thereof and a method of fabricating the semiconductor package

A method of fabricating a semiconductor package including a double-faced semiconductor chip having a first and a second side, the method comprising:

• preparing the semiconductor chip, wherein the semiconductor chip has integrated circuitry on the first and second sides thereof;
• attaching a lead-on-chip (LOC)-type substrate having a first and a second side and having metal patterns on both sides thereof, to the first side of the semiconductor chip with an adhesive;
• performing wire bonding in which a bonding pad on the second side of the semiconductor chip is connected to the metal pattern on the first side of the LOC-type substrate, with one of a plurality of second wires;
• performing a first sealing process in which a second sealing material is applied to the semiconductor chip, the plurality of second wires, and the first side of the LOC-type substrate;
• performing wire bonding in which a bonding pad on the first side of the semiconductor chip, which is exposed by the LOC-type substrate, is connected to metal pattern on the second side of the LOC-type substrate, with one of a plurality of first wires;
• performing a second sealing process in which a first sealing material is applied to the exposed first side of the semiconductor chip, the plurality of first wires, and a portion of the second side of the LOC-type substrate;
• and
• attaching a plurality of solder balls to the second side of the LOC-type substrate.