US 2003/0172340 A1 · Coding-decoding device and coding-decoding method

Abstract

A coding-decoding device and a coding-decoding method that take less time for coding and decoding are provided while using less number of logic gates. A memory device 15 substantially stores b pieces of conversion logic equations produced with a conversion logic equation producing device 13. An operation device 17 has a programmable hardware logic circuit to constitute logics sequentially according to plural execution unit logic equations obtained by dividing b pieces of conversion logic equations stored in the memory device 15 into execution units for respective execution unit logic equations using the hardware logic circuit. Besides, the operation device 17 sequentially divides and calculates the second sentences from the first sentences according to the constituted logics. An output device 19 collects and outputs the second sentences calculated with the operation device 17

Claims20

Dependent claims

A coding-decoding device using a memory device and an operation device having a programmable hardware logic circuit, for converting first sentences expressed with binary numbers into second sentences expressed with binary numbers of b bits, wherein

said memory device substantially stores b pieces of conversion logic equations, each including the bit values of said first sentence as elements, for calculating the bit values of said second sentence, and
said operation device, according to plural execution unit logic equations obtained by dividing into execution units said b pieces of conversion logic equations stored in said memory device, constitutes logics sequentially for each of said execution unit logic equations, and sequentially divides and calculates from said first sentences, on the basis of said constituted logics, said second sentences.

A coding-decoding device comprising a memory matrix section, a switch matrix section, a control section, and a shift register for calculating a second sentence expressed with binary numbers of b bits from a first sentence expressed with binary numbers, wherein

said control section, according to coding and decoding keys when they are entered, calculates b pieces of conversion logic equations expressed as the logical sum of logical products having the bit values of the first sentence as elements for calculating respective bit values of the second sentence,
said memory matrix section stores under the control of said control section the b pieces of conversion logic equations calculated with said control section,
said switch matrix section sequentially calculates under the control of said control section respective bit values of the second sentence on the basis of respective bit values of the first sentence entered and according to the b pieces of conversion logic equations stored in said memory matrix section, and
said shift register shifts and goes on storing respective bit values of the second sentence coming as sent sequentially from said switch matrix section and when the bit values for b bits are ready, outputs them as the second sentence.

1 more element

A coding-decoding method using a memory device and an operation device having a programmable hardware logic circuit, to convert a first sentence expressed with binary numbers into a second sentence expressed with binary numbers of b bits, comprising:

a conversion logic equation storing step of substantially storing in said memory device b pieces of conversion logic equations for calculating b pieces of bit values of the second sentence, with respective conversion logic equations containing the bit values of said first sentence as elements, and
a calculating operation step of causing said operation device to constitute logics sequentially for respective execution unit logic equations while using a hardware logic circuit according to the plural execution unit logic equations obtained by dividing the b pieces of conversion logic equations stored in said memory device into execution units, and to sequentially divide and calculate said second sentence from said first sentence on the basis of the constituted logics.

Dependencies are inferred from the claim text.

Coding-decoding device and coding-decoding method

Life of this patent

Coding-decoding device and coding-decoding method

Life of this patent

Abstract

Claims20