Low power system and method for a data processing system
AssigneeFreescale Semiconductor, Inc.
InventorsWilliam C. Moyer, Brian M. Millar, Michael D. Fitzsimmons
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AssigneeFreescale Semiconductor, Inc.
InventorsWilliam C. Moyer, Brian M. Millar, Michael D. Fitzsimmons
Estimating the term…
Systems and methods are discussed to identify a recoverable state in a low power device. A low power device having an arbiter to grant system bus access to a plurality of bus masters is set to initiate a low power mode of operation. A low power controller within the low power device provides a request to the bus arbiter to initiate a low power mode. The bus arbiter stops granting bus requests to the bus masters and identifies when the system bus has processed all current bus accesses. When the system bus is idle, the bus arbiter returns a bus grant signal to the low power controller. Clocks associated with the bus masters are disabled to suspend the bus arbiters and allow less power to be consumed by the low power device.
A method comprising the steps of:
A method comprising the steps of:
A system comprising:
A system comprising:
Dependencies are inferred from the claim text.