Single port ram presented as multiport RAM
OwnerAndrew Carl Browninventor
Life of this patent
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Abstract
A virtual multiple port memory device and method are disclosed. The virtual multiple port memory device includes a random access memory having only one access port, multiple bus connection ports, and an arbiter for selectively granting to one of the bus connection ports access to the only access port. Each one of multiple processors or agents is coupled to a different one of the bus connection ports in the virtual multiple port memory device utilizing its own, dedicated bus.
Claims13
A virtual multiple port memory device comprising:
- a random access memory having only one access port;
- a plurality of bus connection ports;
- and
- an arbiter for selectively granting to one of said plurality of bus connection ports access to said only one access port.
A method in a data processing system for utilizing a single port random access memory (RAM) as a multiport random access memory (RAM), said method comprising:
- providing a RAM having only one access port;
- coupling said only one access port to a plurality of bus connection ports utilizing a bus;
- and
- providing an arbiter for selecting one of said plurality of bus connection ports to which to grant access to said only one access port.
A virtual multiple port memory device comprising:
- a random access memory having only one access port;
- a plurality of processors;
- a plurality of bus connection ports;
- each one of said plurality of processors being coupled to a different one of said plurality of bus connection ports utilizing its own, dedicated bus;
- and
- an arbiter for selectively granting to one of said plurality of bus connection ports access to said only one access port.
Dependencies are inferred from the claim text.