Method and system for graphical evaluation of IDDQ measurements

Abstract

The present invention relates to a method and system for detecting defects within an integrated circuit in which one or more parameters of a classifier are determined by graphical evaluation of IDDQ current measurements. Parameters of the classifier can include a number of bands for a good integrated circuit, a width of a band for a good chip, a width ratio between any two bands for a good integrated circuit, a separation between bands for a good integrated circuit, a separation ratio between any two bands for a good integrated circuit, a maximum slope for a good band, a variation in a band width for a good band, a maximum IDDQ value for a chip, a minimum IDDQ value for a chip, a mean of a band of a chip, a standard deviation of a band of a chip, a lack of activity of IDDQ measurements conducted in the integrated circuit, noise in the IDDQ measurements conducted in the integrated circuit and glitches in the IDDQ measurements conducted in the integrated circuit. The parameters can be customized for the integrated circuit under test. The method and system can be used with all types of digital CMOS integrated circuits including integrated circuits with or without memories and deep submicron integrated circuits with or without memories.

Dependencies are inferred from the claim text.