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OwnerSeiji Nagahara, Kazutoshi Shiba +3inventors
InventorsSeiji Nagahara, Kazutoshi Shiba, Nobuaki Hamanaka, Tatsuya Usami, Takashi Yokoyama
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A method of manufacturing a semiconductor device having a damascene structure contains a process of forming a first interlayer insulating film (6) and a second interlayer insulating film (4) formed of a low dielectric-constant film on a substrate, forming via holes (9) by using a first resist pattern (1a) formed on the second interlayer insulating film, conducting an organic peeling treatment using organic peeling liquid containing amine components and then forming a second resist pattern (1b) on the second interlayer insulating film. After the wet treatment, before a second antireflection coating (2b) is coated so as to be located below the second resist pattern is coated, at least one of an annealing treatment, a plasma treatment, a UV treatment and an organic solvent treatment is carried out to remove amine components which inhibit the catalysis reaction of acid occurring in the resist at the light exposure, thereby preventing degradation of the resolution of the second resist pattern (1b).
A semiconductor device manufacturing method comprising a step of conducting a wet treatment using organic peeling liquid or cleaning liquid on a substrate having an insulating film formed thereon and then forming a resist pattern on the insulating film, characterized in that before a resist serving as the resist pattern or antireflection coating provided between the insulating film and the resist is coated subsequently to the wet treatment, a pre-treatment for removing reaction inhibiting materials which are contained in the organic peeling liquid or the cleaning liquid and inhibit the chemical reaction of the resist is conducted.
A semiconductor device manufacturing method comprising:
A semiconductor device manufacturing method comprising:
A semiconductor device having a dual damascene wiring structure, comprising at least one of a via and a wire made of conductive material having a side wall, and an interlayer insulating film having a face layer portion contacting at least a portion of the side wall of the via or the wire and an inner portion other than the face layer portion, wherein the interlayer insulating film contains Si and O as a predominant element and the face layer portion is lower in nitrogen concentration than the inner portion.
A semiconductor device having a dual damascene wiring structure, comprising at least one of a via and a wire made of conductive material having a side wall, and a low dielectric constant interlayer insulating film having a face layer portion contacting at least a portion of the side wall of the via or the wire and an inner portion other than the face layer portion, wherein the interlayer insulating film contains Si, O and H as a predominant element and the face layer portion is higher in oxygen concentration and lower in hydrogen concentration than the inner portion.
A semiconductor device having a dual damascene wiring structure, comprising at least one of a via and a wire made of conductive material having a side wall, and a low dielectric constant interlayer insulating film having a face layer portion contacting at least a portion of the side wall of the via or the wire and an inner portion other than the face layer portion, wherein the interlayer insulating film contains Si, O, C and H as a predominant element and the face layer portion is higher in oxygen concentration and lower in carbon and hydrogen concentrations than the inner portion.
A semiconductor device having a dual damascene wiring structure, comprising at least one of a via and a wire made of conductive material having a side wall, and a barrier film or an etching stop film having a face layer portion contacting at least a portion of the side wall of the via or the wire and an inner portion other than the face layer portion, wherein the barrier film or the etching stop film contains Si, C, N and H as a predominant element and the face layer portion is higher in oxygen concentration and lower in carbon, nitrogen and hydrogen concentrations than the inner portion.
A semiconductor device having a dual damascene wiring structure, comprising at least one of a via and a wire made of conductive material having a side wall, and a barrier film or an etching stop film having a face layer portion contacting at least a portion of the side wall of the via or the wire and an inner portion other than the face layer portion, wherein the barrier film or the etching stop film contains Si, C and H as a predominant element and the face layer portion is higher in oxygen concentration and lower in carbon and hydrogen concentrations than the inner portion.
A semiconductor device having a dual damascene wiring structure, comprising at least one of a via and a wire made of conductive material having a side wall, and a low dielectric constant interlayer insulating film having a face layer portion contacting at least a portion of the side wall of the via or the wire and an inner portion other than the face layer portion, wherein the interlayer insulating film contains Si, O and H or alternatively Si, O, C and H as a predominant element and the face layer portion is higher in density than the inner portion.
A semiconductor device having a dual damascene wiring structure, comprising at least one of a via and a wire made of conductive material having a side wall, and a barrier film or an etching stop film having a face layer portion contacting at least a portion of the side wall of the via or the wire and an inner portion other than the face layer portion, wherein the barrier film or the etching stop film contains Si, C, N and H or alternatively Si, C and H as a predominant element and the face layer portion is higher in density than the inner portion.
A semiconductor device having a dual damascene wiring structure, comprising at least one of a via and a wire made of conductive material having a side wall, and a low dielectric constant interlayer insulating film having a face layer portion contacting at least a portion of the side wall of the via or the wire and an inner portion other than the face layer portion, wherein the interlayer insulating film contains Si, O and H as a predominant element and the face layer portion is higher in a ratio of Si—O bond and lower in a ratio of Si—H bond than the inner portion.
A semiconductor device having a dual damascene wiring structure, comprising at least one of a via and a wire made of conductive material having a side wall, and a low dielectric constant interlayer insulating film having a face layer portion contacting at least a portion of the side wall of the via or the wire and an inner portion other than the face layer portion, wherein the interlayer insulating film contains Si, O, C and H as a predominant element and the face layer portion is higher in a ratio of Si—O bond and lower in a ratio of Si—CH3 bond than the inner portion.
A semiconductor device having a dual damascene wiring structure, comprising at least one of a via and a wire made of conductive material having a side wall, and a barrier film or an etching stop film having a face layer portion contacting at least a portion of the side wall of the via or the wire and an inner portion other than the face layer portion, wherein the barrier film or the etching stop film contains Si, C, N and H or alternatively Si, C and H as a predominant element and the face layer portion is lower in a ratio of Si—CH3 bond than the inner portion.
Dependencies are inferred from the claim text.