Method of fabricating a dual damascene structure on a semiconductor substrate

A method of fabricating a dual damascene structure on a semiconductor substrate having a conductive structure, comprising the steps of:

• sequentially forming a first dielectric layer, a second dielectric layer, and a hard mask with a via opening on the semiconductor substrate;
• forming a photoresist pattern having a trench opening on the hard mask, wherein the photoresist pattern has the same etching characteristic as the second dielectric layer;
• etching the second dielectric layer through the via opening while the hard mask is used as the etching mask;
• etching the hard mask using the photoresist pattern as the etching mask to create a damascene opening including the via opening and the trench opening;
• etching the second dielectric layer and the first dielectric layer through the damascene opening to form a dual damascene structure;
• and
• forming a copper layer to fill the dual damascene structure to form a copper interconnect.