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US 2003/0170962 A1Published application
Semiconductor device and manufacturing method thereof
AssigneeFujitsu Limited
InventorMakoto Yasuda
Life of this patent
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Abstract
The present invention includes one wiring or a plurality of wirings and an MIM capacitor formed by capacity coupling of a lower electrode which is connected to an upper surface of the wiring(s) and an upper electrode. The lower electrode is comprised of a material preventive of diffusion of a material of the wiring(s), and it embraces the wiring(s).
Claims20
A semiconductor device, comprising:
- one wiring or a plurality of wirings;
- and
- a capacitor formed by capacity coupling of a lower electrode connected to an upper surface of said wiring and an upper electrode,
- wherein the lower electrode is comprised of a material preventive of diffusion of a material of said wiring and embraces said wiring.
1 more element
A semiconductor device manufacturing method, comprising the steps of:
- forming one wiring or a plurality of wirings;
- and
- forming a capacitor which is formed by capacity coupling of an upper electrode and a lower electrode comprised of a material preventive of diffusion of a material of the wiring and which is connected to an upper surface of the wiring in a region where the lower electrode embraces the wiring.
Dependencies are inferred from the claim text.