Etching processes for integrated circuit manufacturing including methods of forming capacitors
AssigneeMicron Technology, Inc.
InventorsPaul A. Morgan, Patrick M. Flynn, Janos Fucsko
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Abstract
The invention includes semiconductor processing methods, including methods of forming capacitors. In one implementation, a semiconductor processing method includes providing a semiconductor substrate comprising a layer comprising at least one metal in elemental or metal alloy form. The metal comprises an element selected from the group consisting of platinum, ruthenium, rhodium, palladium, iridium, and mixtures thereof. At least a portion of the layer is etched in a halogenide, ozone and H2O comprising ambient.
Claims59
A semiconductor processing method, comprising:
- providing a semiconductor substrate comprising a layer comprising at least one metal in elemental or metal alloy form, the metal comprising an element selected from the group consisting of platinum, ruthenium, rhodium, palladium, iridium, and mixtures thereof;
- and
- etching at least a portion of the layer in a halogenide, ozone and H2O comprising ambient.
A semiconductor processing method, comprising:
- providing a semiconductor substrate comprising a layer comprising at least one metal in elemental or metal alloy form, the metal comprising an element selected from the group consisting of platinum, ruthenium, rhodium, palladium, iridium, and mixtures thereof;
- and
- wet etching at least a portion of the layer using an aqueous halogenide ion containing liquid solution and ozone.
A semiconductor processing method, comprising:
- providing a semiconductor substrate comprising a layer comprising at least one metal in elemental or metal alloy form, the metal comprising an element selected from the group consisting of platinum, ruthenium, rhodium, palladium, iridium, and mixtures thereof;
- and
- spraying an aqueous halogenide ion containing liquid solution onto the layer and providing gaseous ozone onto the layer during the spraying under conditions effective to etch at least a portion of the layer from the substrate.
A semiconductor processing method, comprising:
- forming a layer comprising at least one metal in elemental or metal alloy form over at least one side of a semiconductor wafer, the metal comprising an element selected from the group consisting of platinum, ruthenium, rhodium, palladium, iridium, and mixtures thereof;
- the wafer having a central portion surrounded by a peripheral portion;
- forming masking material over the central portion of the layer while leaving the peripheral portion outwardly exposed;
- and
- etching the peripheral exposed portion of the layer from the wafer using a halogenide, ozone and H2O comprising ambient while the masking material is received over the central portion.
A method of forming a capacitor comprising:
- forming first and second capacitor electrode layers separated by a capacitor dielectric region over a substrate, at least one of the capacitor electrode layers comprising at least one metal in elemental or metal alloy form, the metal comprising an element selected from the group consisting of platinum, ruthenium, rhodium, palladium, iridium, and mixtures thereof;
- forming masking material over a first portion of said at least one capacitor electrode layer while leaving a second portion of said at least one capacitor electrode layer exposed;
- and
- etching the exposed second portion of said at least one capacitor electrode layer using a halogenide, ozone and H2O comprising ambient while the masking material is received over the first portion effective to form a desired pattern of said at least one capacitor electrode layer.
Dependencies are inferred from the claim text.