Methods, circuits, and systems for refreshing memory cells in a memory device that have different refresh periods
AssigneeSamsung Electronics Co., Ltd.
InventorGyu-hong Kim
Life of this patent
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AssigneeSamsung Electronics Co., Ltd.
InventorGyu-hong Kim
Estimating the term…
Memory cells in a memory device are refreshed by selecting a first memory cell having a first refresh period to be refreshed. The first memory cell and a second memory cell having a second refresh period together are refreshed responsive to selecting the first memory cell to be refreshed. A circuit for controlling refreshing of memory cells in a memory devices includes an address register that stores the address of a first memory cell having a first refresh period. A comparison circuit compares an input address with the output of the address register and outputs a control signal indicative of a result of the comparison. An address buffer outputs addresses for refreshing the first memory cell and a second memory cell having a second refresh period together responsive to the control signal indicating a match between the input address and the address of the first memory cell.
A method for refreshing memory cells in a memory device, comprising:
A method for refreshing memory cells in a memory device, comprising:
A circuit for controlling refreshing of memory cells in a memory device, comprising:
A circuit for controlling refreshing of memory cells in a memory device, comprising:
A system for refreshing memory cells in a memory device, comprising:
A system for refreshing memory cells in a memory device, comprising:
Dependencies are inferred from the claim text.