Memory array system

A method for minimizing power consumption in a memory device having a plurality of cells organized in a plurality of rows and columns, comprising the steps of:

• a) during a first refresh operation performing the steps of:
• i) reading data from a row of cells designated by a refresh counter;
• ii) generating a compliment of said data;
• iii) storing said complimented data in a temporary storage area;
• and
• iv) setting a bit to indicate the first refresh operation has been performed;
• b) during a second refresh operation performing the steps of:
• i) reading data from said row of cells designated by the refresh counter;
• ii) generating a compliment of said data;
• iii) comparing said complimented data with said temporarily stored data, wherein an error signal is generated if the complimented data and the stored data are not exact;
• iv) when an error signal is not generated, writing said complimented data to said designated row;
• v) resetting said bit to indicate that the second refresh operation has been performed;
• and
• c) when an error signal is generated and an unused row of cells is identified, performing the steps of:
• i) deactivating the row of cells designated by the refresh counter;
• ii) writing said complimented data to said identified unused row of cells;
• and
• iii) designating said identified unused row of cells as active.

An article of manufacture for use in storing data in a dynamic random access memory array having a plurality of cells organized in a plurality of rows and columns, the article of manufacture having a computer executable instructions embodied in a computer-readable medium, said computer executable instructions when executed perform the steps of:

• a) during a first refresh operation performing the steps of:
• i) reading data from a row of cells designated by a refresh counter;
• ii) generating a compliment of said data;
• iii) storing said complimented data in a temporary storage area;
• and
• iv) setting a bit to indicate the first refresh operation has been performed;
• b) during a second refresh operation performing the steps of:
• i) reading data from said row of cells designated by the refresh counter;
• ii) generating a compliment of said data;
• iii) comparing said complimented data with said temporarily stored data, wherein an error signal is generated if the complimented data and the stored data are not exact;
• iv) when an error signal is not generated, writing said complimented data to said designated row;
• v) resetting said bit to indicate that the second refresh operation has been performed;
• and
• c) when an error signal is generated and an unused row of cells is identified, performing the steps of:
• i) deactivating the row of cells designated by the refresh counter;
• ii) writing said complimented data to said identified unused row of cells;
• and
• iii) designating said identified unused row of cells as active.