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US 2003/0169619 A1Published application
Low power SRAM
AssigneeZarlink Semiconductor Inc.
InventorsMagnus Karl-Olof Karlsson, Koen J. Weijand, Tony Hans Ohlsson
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Abstract
An SRAM has a bit cell for storing a data bit in voltage mode at a data node, and a single bit line for respectively writing to and reading from said data node a data bit in reference current controlled mode. The SRAM has ultra low power consumption and can be used in word based SRAMs.
Claims32
A static random access memory comprising:
- a plurality of bit cells for storing data bit in voltage mode at a data node;
- and
- a single bit line for respectively reading and writing a data bit to said data nodes in reference current controlled mode.
A method of storing a data bit in a static random access memory having a plurality of bit cells, comprising:
- storing data in voltage mode at a data node in each bit cell;
- and
- respectively reading and writing a data bit to said data nodes in reference current controlled mode using a single bit line.
Dependencies are inferred from the claim text.