Signal detection circuit for detecting multiple match in arranged signal lines
AssigneeKawasaki Microelectronics, Inc.
InventorsNaoki Kanazawa, Ryuichi Hata
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AssigneeKawasaki Microelectronics, Inc.
InventorsNaoki Kanazawa, Ryuichi Hata
Estimating the term…
The present invention relates to a signal detection circuit for detecting the presence or absence of signals having the same logic in a plurality of arranged signal lines, and more particularly to a signal detection circuit suitable for multi-hit detection in a content addressable memory. According to the present invention, the signal detection circuit includes a first signal transmission line to transmit a first signal indicating the presence of two or more logic signals to be detected and a second signal transmission line to transmit a second signal indicating the presence of one or more of the logic signals to be detected. Each of the first and second signal transmission lines includes logic circuits. The signal detection circuit may have a hierarchical structure.
A signal detection circuit for detecting the presence or absence of signals having the same logic in a plurality of arranged signal lines, said circuit comprising:
A signal detection circuit for detecting the presence or absence of signals having the same logic in a plurality of arranged signal lines, said circuit comprising:
A content addressable memory device comprising:
Dependencies are inferred from the claim text.