Liquid crystal display device having gate electrode with two conducting layers, one used for self-aligned formation of the TFT semiconductor regions

A liquid crystal display apparatus comprising:

• a pair of substrates at least one of which is transparent;
• and
• a liquid crystal layer sandwiched between said pair of substrates;
• wherein one of said pair of substrates has a plurality of scanning wires, a plurality of signal wires intersecting said scanning wires in a matrix fashion, and a plurality of semiconductor elements placed at intersection points between said scanning wires and said signal wires;
• wherein said plurality of scanning wires have a first wiring layer and a second wiring layer formed in direct contact with a side surface of the first wiring layer;
• wherein each of said plurality of semiconductor elements includes:
• a semiconductor layer having a channel region and a pair of semiconductor regions of a given conductivity type which sandwich said channel region and which are each made of a high-resistance region and a low-resistance region;
• and an electrode formed on said channel region with an insulating film interposed therebetween;
• and
• wherein each of the electrodes in said plurality of semiconductor elements is comprised of the corresponding one of said plurality of scanning wires, part of said second wiring layer being overlaid on part of the high-resistance regions of said pair of semiconductor regions of said given conductivity type with said insulating film interposed therebetween.

A liquid crystal display apparatus comprising:

• a pair of substrates at least one of which is transparent;
• and
• a liquid crystal layer sandwiched between said pair of substrates;
• wherein one of said pair of substrates has a display region and a region of driving circuits for driving said display region;
• wherein said display region has a plurality of first semiconductor elements arranged in a matrix fashion;
• wherein the driving circuit region has a plurality of second semiconductor elements;
• wherein each of said pluralities of first and second semiconductor elements includes:
• a semiconductor layer having a channel region and a pair of semiconductor regions of a given conductivity type which sandwich said channel region and which are each made of a high-resistance region and a low-resistance region;
• and an electrode formed on said channel region with an insulating film interposed therebetween;
• and
• wherein said electrode has a first wiring formed on said insulating film and a second wiring formed on said first wiring such that said second wiring is directly in contact with a side surface of said first wiring, part of said second wiring being overlaid on part of the high-resistance regions of said pair of semiconductor regions of said given conductivity type with said insulating film interposed therebetween.