I/Q demodulator and I/Q signal sampling method thereof
AssigneeSamsung Electronics Co., Ltd.
InventorChan-Sub Park
Life of this patent
Estimating the term…
Abstract
An I/Q demodulator optimized with a minimum amount of hardware. First and second multiplexers generate I and Q signals with respect to an input data signal; and first and second 2-decimation units decimate the I and Q signals generated by the first and second multiplexers, to output effective I and Q signals. A filtering unit filters the effective I and Q signals. As a result, a size of the hardware is reduced, and an operation frequency of the filter is reduced.
Claims22
An I/Q demodulator, comprising:
- first and second multiplexers which generate I and Q signals with respect to an input data signal;
- first and second decimation units which perform a decimation on the I and Q signals output from the first and second multiplexers and output effective I and Q signals;
- and
- a filtering unit which filters the effective I and Q signals.
An I/Q signal generating method, comprising:
- generating I and Q signals with respect to an input data signal;
- decimating the I and Q signals, to output effective I and Q signals;
- and
- filtering the effective I and Q signals.
An I/Q demodulator comprising:
- first and second decimation units which decimate even-numbered input data signals and odd-numbered input data signals, respectively;
- first and second multiplexers which generate an I signal of an inphase component and a Q signal of a quadrature component with respect to the decimated even-numbered data signals and the odd-numbered data signals, respectively;
- and
- a filtering unit which filters the I and Q signals output from the first and second multipelxers, respectively.
A method of generating an I/Q signal, comprising:
- separating an even-numbered input data signal from an odd-numbered input data signal;
- generating an I signal of an inphase component and a Q signal of a quadrature component with respect to the even-numbered and odd-numbered data signals, respectively;
- and
- filtering the I and Q signals.
An I/Q demodulator, comprising:
- a first multiplexer which multiplexes an input signal and other signals to output an I signal;
- a second multiplexer which multiplexes the input signal and the other signals to output a Q signal;
- a delay unit which delays the I signal;
- a first decimation unit which decimates the delayed I signal;
- a second decimation unit which decimates the Q signal;
- and
- first and second filters which filter the decimated I and Q signals, to output effective I and Q signals.
An I/Q demodulator, comprising:
- a delay unit which delays an input data signal and outputs a delayed input signal;
- first and second decimation units which decimate the input data signal and the delayed input signal, respectively;
- a first multiplexer which multiplexes the decimated delayed input data signal and a negative of the delayed input signal to output an I signal;
- a second multiplexer which multiplexes the decimated non-delayed input data signal and a negative of the non-delayed input signal to output a Q signal;
- and
- first and second filters which filter the I and Q signals, to output effective I and Q signals, respectively.
An I/Q demodulator, comprising:
- a first multiplexer which multiplexes an input signal and other signals to output an I signal;
- a second multiplexer which multiplexes the input signal and the other signals to output a Q signal;
- first and second upsampling units which upsample the I and Q signals, respectively;
- first and second delay units which delay the upsampled I and Q signals, respectively;
- first and second decimation units which decimate the delayed I and Q signals, respectively;
- first and second low pass filters which filter the decimated I and Q signals;
- and
- first and second M-downsampling units which M-downsample the decimated I and Q signals, to output effective I and Q signals, wherein the M of each M-downsampling unit is even.
An I/Q demodulator, comprising:
- a first multiplexer which multiplexes an input signal and other signals to output an I signal;
- a second multiplexer which multiplexes the input signal and the other signals to output a Q signal;
- first and second upsampling units which upsample the I and Q signals, respectively;
- a delay unit which delays the upsampled I signal;
- first and second decimation units which decimate the delayed I signal and the Q signal, respectively;
- first and second low pass filters which filter the decimated delayed I signal and the decimated Q signal, respectively;
- and
- first and second M-downsampling units which M-downsample the filtered decimated delayed I signal and the filtered decimated Q signal, to output effective I and Q signals, respectively, wherein the M of each M-downsampling unit is odd.
An I/Q demodulator, comprising:
- a delay unit which delays an input data signal and outputs a delayed input signal;
- first and second decimation units which decimate the input data signal and the delayed input signal, respectively;
- a first multiplexer which multiplexes the decimated delayed input data signal and a negative of the delayed input signal to output an I signal;
- a second multiplexer which multiplexes the decimated non-delayed input data signal and a negative of the non-delayed input signal to output a Q signal;
- first and second upsampling units which upsample the I and Q signals, respectively;
- first and second filters which filter the upsampled I and Q signals, respectively;
- and
- first and second M-downsampling units which M-downsample the filterd I and Q signals, respectively, to output effective I and Q signals, respectively.
Dependencies are inferred from the claim text.