Semiconductor wafer examination system

A semiconductor wafer examination system comprising:

• a defect classification device adapted to pick up an image of the surface (defect image) of a defective semiconductor wafer, compare the defect image with an image of the surface of a normal semiconductor wafer (normal image), identify each defective area isolated as characteristic area of a defect in the defect image on the basis of the outcome of the comparison and defect detection parameters for defining threshold values for defects and automatically determine the type of defect of the defective area on the basis of a knowledge base for determining the type of defect according to the characteristic quantity of the defective area;
• and
• a classification support device including a classification means for identifying the defective areas of a plurality of defect images on the basis of the normal image and the defect detection parameters and classifying the identified defective areas;
• a defective area display means for displaying the plurality of defective areas as classified by said classification means, an editing means for editing the defect detection parameters on the basis of the defective areas displayed by said defective area display means, a classification result re-instructing means for manually re-classifying the result of classification of the defective areas obtained by said classification means and a selection means for selecting classified defect image data for preparing the knowledge base from the plurality of defective areas as classified by the classification result re-instructing means.