Comparator

Abstract

A comparator includes a differential amplifier stage comprising two emitter-interconnected bipolar transistors whose bases form the two inputs of the comparator, a first load element connected to the collector of the first bipolar transistor and a second load element connected to the collector of the second bipolar transistor. The comparator also includes a first MOSFET and a second MOSFET, a circuit point at which the drop in voltage across the first load element in operation of the differential amplifier stage occurs is connected to the source of the first MOSFET and the backgate of the second MOSFET, the circuit point at which the drop in voltage across the second load element in operation of the differential amplifier stage being connected to the source of the second MOSFET and the backgate of the first MOSFET, and the drain of the second MOSFET forming the output of the comparator. The comparator, in addition to providing the low offset voltage of a differential amplifier stage comprising bipolar transistors, also features a low current consumption and very fast response.

Dependencies are inferred from the claim text.