Flip chip packaging using recessed interposer terminals

A semiconductor device assembly comprising:

• a wafer having an active surface and a back surface and including a plurality of unsingulated semiconductor dice, each of said dice having a plurality of spaced conductive bumps on said active surface;
• and
• a wafer scale interposer superimposed on said wafer, having a first surface and a second surface and comprising a dielectric member, said wafer scale interposer including a plurality of unsingulated interposer substrates each sized and aligned with one of said plurality of semiconductor dice of said wafer, each of said interposer substrates having a plurality of recesses opening onto said first surface and extending through said dielectric member to conductive terminals at recess bottoms proximate said second surface;
• wherein at least one of said spaced conductive bumps is substantially received in each recess of said plurality in conductive contact with a conductive terminal.

An electronic system comprising:

• a processor device coupled to an input device and an output device;
• and
• a semiconductor assembly coupled to at least one of said processor device, said input device and said output device, said semiconductor assembly comprising:
• a semiconductor die having an active surface and a back surface, said active surface having a plurality of spaced conductive bumps extending transversely therefrom;
• and
• an interposer substrate having first surface and a second, opposing surface, said interposer substrate comprising a dielectric member having a plurality of spaced recesses opening onto said first surface and extending through said dielectric member to conductive terminals at recess bottoms proximate said second surface;
• wherein at least one of said spaced conductive bumps is substantially received in each recess of said plurality in conductive contact with a conductive terminal.

A semiconductor device assembly, comprising:

• a flexible interposer substrate including at least one conductive layer comprising a plurality of conductive traces and at least one dielectric member, the at least one dielectric member having a plurality of recesses extending from a surface of one side of the interposer substrate through the at least one dielectric member to expose portions of conductive traces of the plurality;
• the plurality of recesses being arranged in at least two patterns located on one side of the interposer substrate;
• and
• at least two semiconductor dice of flip-chip configuration having a plurality of conductive elements projecting therefrom, wherein each semiconductor die is operably coupled to at least some of the plurality of conductive traces by conductive elements received in a pattern of recesses;
• the interposer substrate being folded so that the at least two semiconductor dice operably coupled to conductive traces through a pattern of recesses on the one side of the interposer substrate are oriented in substantially superimposed back-to-back relationship between portions of the interposer substrate.