Information processing unit
AssigneeNEC Electronics Corporation
InventorWataru Kiriake
Life of this patent
Estimating the term…
Abstract
An information processing unit has a system bus that connects devices configuring the information processing unit; an arbiter that performs arbitration related to use of this system bus; and a clock control circuit that controls the clock to be supplied to the devices, wherein the clock control circuit has means for performing a bus request to the arbiter; and means for performing a clock switch or clock halt after being granted use of the bus by the arbiter.
Claims7
An information processing unit having a system bus that connects devices configuring an information processing unit;
- an arbiter that performs arbitration related to use of this system bus;
- and a clock control circuit that controls a clock to be supplied to the devices,
- wherein the clock control circuit comprises:
- means for performing a bus request to the arbiter;
- and means for performing a clock switch or clock halt after being granted use of the bus by the arbiter.
An information processing unit which has a system bus that connects devices configuring an information processing unit;
- an arbiter that performs arbitration related to use of this system bus;
- and a clock control circuit that controls a clock to be supplied to the devices;
- comprising:
- means for performing a bus request to the arbiter from a device other than the clock control circuit;
- means for writing prescribed data into a prescribed register by a device to which bus grant is given;
- and means for performing a clock switch or clock halt in response to write-in of the prescribed data into the register.
Dependencies are inferred from the claim text.