Synchronous semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorTakayuki Harima
Life of this patent
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Abstract
A first circuit is disposed on the semiconductor substrate, operates synchronously with a first clock signal, and outputs a first output signal delayed by a first delay time from the first clock signal. A first measuring circuit measures indirectly a first increase and a first decrease of the first delay time. A setting circuit operates synchronously with the first clock signal, outputs a second clock signal delayed from the first clock signal by a second delay time adding the first increase and subtracting the first decrease. A second circuit inputs the first output signal and operates synchronously with the second clock signal.
Claims20
A semiconductor device formed on a semiconductor substrate, comprising:
- a first circuit disposed on the semiconductor substrate, configured to operate synchronously with a first clock signal, and configured to output a first output signal delayed by a first delay time from the first clock signal;
- a first measuring circuit configured to measure indirectly a first increase and a first decrease of the first delay time;
- a setting circuit configured to operate synchronously with the first clock signal, configured to output a second clock signal delayed from the first clock signal by a second delay time adding the first increase and subtracting the first decrease;
- and
- a second circuit configured to input the first output signal and configured to operate synchronously with the second clock signal.
Dependencies are inferred from the claim text.