Repeated instruction execution

A processing unit according to any preceding claim, which comprises a plurality of flags, said flags defining a condition under which the processing unit is selected for operation if that condition matches a condition defined in a modifier which forms part of the instruction being executed.

A vector processing unit for executing vector instructions, each instruction defining multiple value pairs, an operation to be executed and a repeat indicator, the vector processing system comprising a plurality of parallel processing units, each processing unit having an execution unit for executing the operation defined in the instruction on a pair of input values and for generating a result;

• a repeat control unit for causing said operation to be repeatedly executed on successive pairs of values;
• a scalar result unit connected to receive the results from the parallel processing units and to generate a final output value on each repeated execution;
• wherein the instruction includes a repeat indicator which indicates the number of times the operation is to be executed for that instruction and a condition, the repeat control unit being operable in response to said repeat indicator to determine the number of times the operation is executed by the execution unit, and to cease repeated execution on detection that the output value satisfies said condition whether or not the operation has been executed said number of times.

A computer program comprising an instruction stream including vector instructions, each vector instruction defining multiple value pairs, an operation to be executed on each value pair, a repeat indicator and a condition, the computer program being loadable into a processing unit and co-operable therewith to implement said operation for the number of times indicated by the repeat indicator on successive, pairs of values for as long as the result of said execution of each repeated operation satisfies said condition.