Data access in a processor
AssigneeAlphamosaic Limited
InventorsStephen Barlow, Neil Bailey, Timothy Ramsdale, David Plowman, Robert Swann
Life of this patent
Estimating the term…
Abstract
A data processor comprising: a first processor unit having a first register memory addressable in a first format; a second processor unit having a second register memory addressable in a second format, and being capable of retrieving data from the first processor unit; the second processor unit being capable of executing an instruction including an operand specified by means of a reference to data in the first register memory.
Claims14
A data processor comprising:
- a first processor unit having a first register memory addressable in a first format;
- a second processor unit having a second register memory addressable in a second format, and being capable of retrieving data from the first processor unit;
- the second processor unit being capable of executing an instruction including an operand specified by means of a reference to data in the first register memory.
A data processor as claimed in any preceding claim, wherein the first format is a scalar format.
A data processor as claimed in any preceding claim, wherein the second format is a vector format.
A data processor as claimed in any preceding claim, wherein the first processing unit and the second processing unit are arranged on the same integrated circuit.
A data processor substantially as herein described with reference to the accompanying drawings.
Dependencies are inferred from the claim text.