Apparatus and method for selective memory attribute control

An apparatus, for adding instruction level memory trait control features to an existing instruction set, the apparatus comprising:

• an escape tag, for reception by translation logic, and for indicating that accompanying parts of a corresponding instruction prescribe a memory access, wherein said escape tag is a first opcode within the existing instruction set;
• a memory trait specifier, coupled to said escape tag and being one of said accompanying parts, for prescribing one of a plurality of memory traits for said memory access;
• and
• extended execution logic, coupled to said translation logic, for executing said memory access using said one of said plurality of memory traits, wherein the existing instruction set provides only for specification of a default memory trait for said memory access, and wherein said execution logic employs said one of a plurality of memory traits to override said default memory trait.

A method for extending an existing instruction set architecture to provide for selective memory attribute control at the instruction level, the method comprising:

• providing an extended instruction, the extended instruction including an extended tag along with an extended prefix, wherein the extended tag is a first opcode entity according to the existing instruction set architecture;
• prescribing, via the extended prefix, a memory attribute to be employed for a corresponding memory access, wherein the memory access is specified by remaining parts of the extended instruction;
• and
• employing the memory attribute to execute the memory access, wherein said employing supersedes a default memory attribute for the memory access.