Method for DRAM control with adjustable page size

A memory control method for a computer system having a plurality of dynamic random access memory (DRAM) modules installed therein, comprising the steps of:

• identifying the DRAM types of the installed DRAM modules;
• determining a maximum page size of each DRAM module and setting a page mask for each DRAM module in accordance with the respective DRAM types;
• storing an internal address for a prior DRAM access, wherein the internal address includes a first portion, a second portion and a third portion;
• receiving a next DRAM access, wherein the next DRAM access follows the prior DRAM access;
• selecting one of the DRAM modules as a next selected module, in accordance with an internal address for the next DRAM access;
• masking a third portion of the internal address for the prior DRAM access with the page mask corresponding to a prior selected module to produce an adjustable page portion of the internal address for the prior DRAM access;
• masking a third portion of an internal address for the next DRAM access with the page mask corresponding to the next selected module to produce an adjustable page portion of the internal address for the next DRAM access;
• determining if the next DRAM access is a page hit access when a first portion of the internal address for the prior DRAM access matches a first portion of the internal address for the next DRAM access and the adjustable page portion of the internal address for the prior DRAM access matches the corresponding adjustable page portion of the internal address for the next DRAM access;
• and
• mapping a second portion of the internal address for the next DRAM access, in accordance with the maximum page size corresponding to the next selected module, into a column address of the DRAM,
• wherein address bits of the second portion are consecutive.