Method and apparatus embedding PCI-to PCI bridge functions in PCI devices using PCI configuration header type 0
AssigneeInternational Business Machines Corporation
InventorAndrew Moy
Life of this patent
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Abstract
A method and apparatus embedding PCI-to-PCI bridge functions in PCI devices using PCI configuration header type 0 is disclosed. The PCI-to-PCI bridge function is implemented in PCI devices using the standard Type 0 PCI Configuration Header that supports up to six Base Address Registers. Having the PCI-to-PCI bridge function integrated with other PCI device functions has the advantage of reducing valuable card real estate and power consumption.
Claims19
A method for supporting Peripheral Component Interconnect (PCI) bridge functions within a PCI device, comprising:
- providing first bi-directional prefetchable memory transactions between a primary PCI bus and a first secondary PCI bus, the primary PCI bus being coupled to a host system;
- providing second bidirectional prefetchable memory transactions between the primary PCI bus and a second secondary PCI bus;
- and
- providing internal memory devices accessible to the primary PCI bus, the first secondary PCI bus and the second secondary PCI bus.
A computer system having a PCI device with an embedded PCI-to-PCI bridge coupling secondary buses thereto, comprising:
- a system bus connected to a processor and a system memory;
- a PCI device having an embedded PCI-to-PCI bridge being coupled to the system bus;
- and
- a plurality of PCI secondary buses connected to said system bus via the PCI-to-PCI bridge;
- wherein the PCI-to-PCI bridge comprises a primary PCI bus interface, a first secondary PCI bus interface and a second secondary PCI bus interface, the primary PCI bus interface and the first secondary PCI bus interface providing first bi-directional prefetchable memory transactions between the primary PCI bus and a second secondary PCI bus and the primary PCI bus interface and the second secondary PCI bus interface providing second bidirectional prefetchable memory transactions between the primary PCI bus and a second secondary PCI bus, the PCI-to-PCI bridge further comprising internal memory devices accessible to the primary PCI bus interface, the first secondary PCI bus interface and the second secondary PCI bus interface.
A PCI device having an embedded PCI-to-PCI bridge, comprising:
- a primary PCI bus interface coupled to a primary PCI bus;
- a first secondary PCI bus interface coupled to a first secondary PCI bus;
- a second secondary PCI bus interface coupled to a secondary PCI bus;
- and
- internal memory devices coupled to the primary PCI bus interface, the first secondary PCI bus interface and the second secondary PCI bus interface;
- wherein the primary PCI bus interface and the first secondary PCI bus interface providing first bidirectional prefetchable memory transactions between the primary PCI bus and the second secondary PCI bus and the primary PCI bus interface and the second secondary PCI bus interface providing second bi-directional prefetchable memory transactions between the primary PCI bus and the second secondary PCI bus.
The PCI device of claim 17 wherein the two registers include a map address register to store the mapped PCI base address field for a secondary PCI bus initiator to use during a PCI-to-PCI bridge transaction.
A PCI device having an embedded PCI-to-PCI bridge, comprising:
- primary PCI bus interface means coupled to a primary PCI bus;
- first secondary PCI bus interface means coupled to a first secondary PCI bus;
- second secondary PCI bus interface means coupled to a secondary PCI bus;
- and
- means for providing internal memory, the means for providing internal memory is coupled to the primary PCI bus interface means, the first secondary PCI bus interface means and the second secondary PCI bus interface means;
- wherein the primary PCI bus interface means and the first secondary PCI bus interface means provide first bi-directional prefetchable memory transactions between the primary PCI bus and the second secondary PCI bus and the primary PCI bus interface means and the second secondary PCI bus interface means provide second bidirectional prefetchable memory transactions between the primary PCI bus and the second secondary PCI bus.
Dependencies are inferred from the claim text.