Method and computer software product for calculating and presenting a numerical value representative of a property of a circuit

A method of calculating, by the use of a computer, a delay time of a signal passing through a logic level circuit which consists of a plurality of logic blocks from pin-to-pin delay time, which is delay time of a signal passing between an input pin and an output pin of a logic block, and block-to-block delay time, which is delay time of a signal passing between two logic blocks connected to each other, comprising the steps of:

• (a) calculating the pin-to-pin delay time and the block-to-block delay time without calculating in aging caused by hot carrier effect;
• (b) calculating variations of delay times that signals pass through transistors connected to the input and output pin caused by said aging;
• and,
• (c) modifying the pin-to-pin delay time and the block-to-block delay time calculated in step (a) by the variations calculated in step (b).

A method of calculating, by the use of a computer, pin-to-pin delay time Tiopath—aged, which is delay time of a signal passing between an input pin and an output pin of a logic block, and block-to-block delay time Tconnect—aged, which is delay time of a signal passing between said two logic blocks connected to each other, comprising the steps of:

• (a) calculating an amount of stress Sin cast by the input pin and and an amount of stress Sout cast by the output pin according to the following expression:
• when it is assumed that a load capacitance is represented by C[pF], constants
• 28 S = α ⁡ ( C W ) β
• depending on change of inputted waveform are represented by α and β, and width of channel of the transistor connected to the pin is represented by W[μm];
• (b) calculating an aged delay time of the input pin δin[%] and an aged delay time δout[%] according to the following expression:
• when it is assumed that a constant depending on physical structure of the pin
• 29 δ = γ ⁡ ( τ ⁢ ⁢ S ⁢ ⁢ f ϵ 1 ⁢ ⅇ κ ⁢ ⁢ T ) 1 ϵ 2
• is represented by γ, the term of a guarantee of the LSI is represented by υ[hour], constants depending on process are represented by ε1 ε2 and κ, working frequency is represented by f[Hz], and absolute temperature is represented by T[K];
• (c) calculating the pin-to-pin delay time Tiopath—aged and the block-to-block delay time Tconnect—aged according to the following expressions:
• when it is assumed that pin-to-pin delay time and block-to-block delay time
• Tiopath—aged=Tiopath—aged(1+λinδin+λoutδout) Tconnect—aged=Tconnect—fresh(1+λoutδout)
• calculated ignoring aging caused by hot carrier effect are represented by Tiopath—fresh [ps] and Tconnect—fresh [ps], and ratios of delay times occurred at the input stage and the output stage to whole delay time occurred from the input pin to the output pin are represented by λin and λout.

A computer software product for calculating a delay time of a signal passing through a logic level circuit which consists of a plurality of logic blocks from pin-to-pin delay time, which is delay time of a signal passing between an input pin and an output pin of a logic block, and block-to-block delay time, which is delay time of a signal passing between two logic blocks connected to each other, the product making a computer execute the following processes:

• (a) calculating the pin-to-pin delay time and the block-to-block delay time without calculating in aging caused by hot carrier effect;
• (b) calculating variations of delay times that signals pass through transistors connected to the input and output pin caused by said aging;
• and,
• (c) modifying the pin-to-pin delay time and the block-to-block delay time calculated in step (a) by the variations calculated in step (b).

A computer software product for calculating pin-to-pin delay time Tiopath—aged, which is delay time of a signal passing between an input pin and an output pin of a logic block, and block-to-block delay time Tconnect—aged, which is delay time of a signal passing between said two logic blocks connected to each other by a computer, the product making a computer execute the following processes:

• (a) calculating an amount of stress Sin cast by the input pin and an amount of stress Sout cast by the output pin according to the following expression:
• when it is assumed that a load capacitance is represented by C[pF], constants
• 30 S = α ⁡ ( C W ) β
• depending on change of inputted waveform are represented by α and β, and width of channel of the transistor connected to the pin is represented by W[μm];
• (b) calculating an aged delay time of the input pin δin[%] and an aged delay time δout[%] according to the following expression:
• when it is assumed that a constant depending on physical structure of the pin
• 31 δ = γ ⁡ ( τ ⁢ ⁢ Sf ϵ 1 ⁢ ⅇ κ ⁢ ⁢ T ) 1 ϵ 2
• is represented by γ, the term of a guarantee of the LSI is represented by τ[hour], constants depending on process are represented by ε1 ε2 and κ, working frequency is represented by f[Hz], and absolute temperature is represented by T[K];
• (c) calculating the pin-to-pin delay time Tiopath—aged and the block-to-block delay time Tconnect—aged according to the following expressions:
• Tiopath—aged=Tiopath—fresh(1+λinδin+λout67 out) Tconnect—aged=Tconnect—fresh(1+λoutδout)
• when it is assumed that pin-to-pin delay time and block-to-block delay time calculated ignoring aging caused by hot carrier effect are represented by Tiopath—fresh [ps] and Tconnect—fresh [ps], and ratios of delay times occurred at the input stage and the output stage to whole delay time occurred from the input pin to the output pin are represented by λin and λout.