Systems and methods for facilitating testing of pad receivers of integrated circuits
AssigneeAgilent Technologies, Inc.
InventorsShad R. Shepston, Jeffrey R. Rearick, John G. Rohrbaugh
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AssigneeAgilent Technologies, Inc.
InventorsShad R. Shepston, Jeffrey R. Rearick, John G. Rohrbaugh
Estimating the term…
A preferred integrated circuit for facilitating receiver trip level testing functionality includes a first pad which incorporates a first driver and a first receiver. The first driver is configured to provide a first pad output signal to a component external to the IC. The first receiver is configured to receive a first pad input signal from a component external to the IC, and to provide a first receiver digital output signal to a component internal to the IC in response to the first pad input signal. Additionally, a first test circuit is provided that is arranged internal to the IC, with the first test circuit being adapted to provide information corresponding to at least one receiver trip-level characteristic of the first receiver of the first pad. Systems, methods and computer readable media also are provided.
A method for testing an integrated circuit (IC), the IC having a first pad configured as a signal interface for components external to the IC, the first pad having a receiver configured to receive a signal from a component external to the IC and to provide a digital signal in response thereto, said method comprising:
An integrated circuit (IC) comprising:
An integrated circuit (IC) comprising:
A system for measuring a receiver trip-level characteristic comprising:
A computer readable medium having a computer program for facilitating measuring of a receiver trip-level characteristic of an integrated circuit (IC), the IC having a first pad and a first test circuit, the first pad being configured as a signal interface for components external to the IC, the first pad having a receiver configured to receive a signal from a component external to the IC and to provide a digital signal in response thereto, the first test circuit being internal to the IC and being adapted to provide information corresponding to at least one receiver trip-level characteristic of the first receiver, said computer readable medium comprising:
Dependencies are inferred from the claim text.