CMOS current mode RF detector and method
AssigneeSemiconductor Components Industries, LLC
InventorAntonin Rozsypal
Life of this patent
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Abstract
An integrated detector circuit (20) includes first and second gain stages (GS1, GS2). The first gain stage has an input (82) that monitors a high frequency signal (VRFDET) for routing a first detection current (IS1) to a node (60). The second gain stage includes a first current source (PF1) that supplies a bias current (IMAX1) indicative of a predefined amplitude of the high frequency signal. An input of the second gain stage monitors the high frequency signal to route a portion of the bias current to the node as a second detection current (IS2), which is limited to the bias current when the high frequency signal is greater than the predefined amplitude to compensate for a nonlinearity in a transconductance of the second gain stage.
Claims20
An integrated detector circuit, comprising:
- a first gain stage having an input that monitors a high frequency signal for routing a first detection current to a node;
- and
- a second gain stage including a first current source for supplying a bias current indicative of a predefined amplitude of the high frequency signal, and having an input for monitoring the high frequency signal to route a portion of the bias current to the node as a second detection current, wherein the second detection current is limited to the bias current when the high frequency signal is greater than the predefined amplitude.
A detector circuit, comprising gain stages that include current sources for establishing maximum current levels in the gain stages at corresponding amplitudes of a high frequency signal, wherein the gain stages function with transfer functions that convert the high frequency signal to detection currents for summing at a common node to produce an output detection signal as a substantially linear function of the high frequency signal, wherein the detection currents reach the maximum current levels at the corresponding amplitudes to compensate for nonlinearities in the transfer functions.
A method of detecting a high frequency signal, comprising the steps of:
- amplifying a high frequency signal with a first transconductance to produce a first detection current;
- amplifying the high frequency signal with a second transconductance to produce a second detection current for summing with the first detection current to produce an output signal;
- and
- limiting the first detection current to a constant value to compensate for a nonlinearity in the second transconductance when the high frequency signal is greater than a predefined amplitude.
A detector circuit, comprising:
- a current source for providing a bias current;
- a first transistor operating in response to a high frequency signal and having a first width and a first conduction electrode coupled to a node for producing a portion of the bias current as a first detection current;
- and
- a second transistor operating in response to the high frequency signal, having a second width less than the first width, and having a first conduction electrode coupled to the node for producing a second detection current for summing with the first detection current to produce an output signal.
Dependencies are inferred from the claim text.