Method of alignment for buried structures formed by surface transformation of empty spaces in solid state materials
AssigneeMicron Technology, Inc.
InventorsPaul A. Farrar, Joseph E. Geusic
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Abstract
A method of aligning a plurality of empty-spaced buried patterns formed in semiconductor monocrystalline substrates is disclosed. In an exemplary embodiment, high-temperature metal marks are formed to include a conductive material having a melting temperature higher than an annealing temperature used to form such empty-spaced buried patterns. The high-temperature metal marks are formed prior to the formation of the empty-spaced buried patterns formed in a monocrystalline substrate, so that the empty-space buried patterns are aligned to the marks. Subsequent semiconductor structures that are formed as part of desired semiconductor devices can be also aligned to the marks.
Claims103
A method of forming a semiconductor device, comprising the steps of:
- forming at least one alignment mark in association with a semiconductor substrate;
- and
- forming a plurality of empty-spaced patterns beneath a surface of, and within, said semiconductor substrate, said empty-spaced patterns being surrounded by semiconductor material, said forming of said empty-spaced patterns including the aligning of said empty-spaced patterns to said alignment mark.
A method of aligning at least one buried conductor pattern in a monocrystalline substrate, said method comprising the steps of:
- forming at least one alignment mark in association with said monocrystaline substrate;
- forming a plurality of cylindrical holes in said monocrystalline substrate, said cylindrical holes being aligned with respect to said at least one alignment mark;
- annealing said monocrystaline substrate to form at least one empty-spaced pattern within, and surrounded by, said monocrystalline substrate and below a surface of said monocrystalline substrate;
- forming at least one opening in said monocrystaline substrate which communicates with a respective empty-spaced pattern;
- and
- forming a conductive material in said empty-spaced pattern to form said at least one buried conductor pattern.
A method of aligning buried structures within a silicon substrate, said method comprising the steps of:
- forming at least one alignment mark in association with said silicon substrate;
- forming a plurality of cylindrical holes in said silicon substrate, said cylindrical holes being successively aligned with respect to said at least one alignment mark;
- annealing said silicon substrate to form at least one empty-spaced pattern within, and surrounded by, said silicon substrate and below a surface of said silicon substrate;
- forming at least one opening in said silicon substrate which communicates with a respective empty-spaced pattern;
- and
- forming a conductive material in said empty-spaced pattern.
An integrated circuit substrate comprising at least one empty-spaced pattern provided beneath a surface of, and within, a semiconductor substrate, said empty-spaced pattern being aligned with respect to an alignment mark.
A processor system comprising:
- a processor;
- and
- a circuit coupled to said processor, at least one of said circuit and processor comprising:
- at least one alignment mark formed within a substrate;
- and
- a plurality of empty-spaced patterns formed by annealing said substrate having at least one hole drilled therein, said empty space patterns being aligned with respect to said at least one alignment mark.
Dependencies are inferred from the claim text.