Signal paths providing multiple test configurations
OwnerMasashi Shimanouchi, Howard Maasseninventors
Life of this patent
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Abstract
Method and apparatus for circuit testing with signal paths providing multiple test configurations. Circuitry for use in testing electronic circuits includes switching circuitry operable to be controlled to make one of a first signal path and a second signal path. The first signal path is configured to carry a signal between a first node and a second node. The second signal path is configured to carry a signal between the first node and a third node. Each of the signal paths includes a portion that is located in pin electronics. The first node is connectable to a first pin of a device under test. The second node is connectable to a second pin of a device under test. The third node is connectable to an electronic instrument.
Claims22
Circuitry for use in testing electronic circuits, comprising:
- switching circuitry operable to be controlled to make one of a first signal path and a second signal path, the first signal path being configured to carry a signal between a first node and a second node, the second signal path being configured to carry a signal between the first node and a third node, each of the signal paths including a portion that is located in pin electronics, the first node being connectable to a first pin of a device under test, the second node being connectable to a second pin of a device under test, and the third node being connectable to an electronic instrument.
A computer-implemented method for configuring pin electronics, comprising:
- receiving input that specify one or more tests;
- selecting, for each test, a configuration of a switching circuitry of the pin electronics, the configuration being any combination of a loop back configuration, a voltage leveling configuration, a jitter measurement configuration, and a jitter injected configuration;
- and
- configuring the switching circuitry according to the selected configuration.
A computer program product, tangibly embodied in any combination of a machine-readable medium and a propagated carrier signal, for controlling pin electronic circuitry, comprising instructions operable to cause the pin electronic circuitry to:
- receive input that specify one or more tests;
- select, for each test, a configuration of a switching circuitry of the pin electronics, the configuration being any combination of a loop back configuration, a voltage leveling configuration, a jitter measurement configuration, and a jitter injected configuration;
- and
- configure the switching circuitry to the selected configuration.
Dependencies are inferred from the claim text.