Nonvolatile semiconductor memory device and data readout method for the same

A nonvolatile semiconductor memory device comprising:

• a memory array comprising a plurality of memory cells and reference cells;
• a plurality of word lines each connected to control gates of memory cells, from among the plurality of memory cells, in a row direction;
• a plurality of sub-bit lines each connected to drain sides of memory cells, from among the plurality of memory cells, and a reference cell, from among the reference cells, in a column direction;
• a first main bit line connected to one of the plurality of sub-bit lines;
• a second main bit line connected to another one of the plurality of sub-bit lines;
• an amplifier for amplifying a potential difference between the first main bit line and the second main bit line;
• a precharge circuit for precharging the first and the second main bit lines to a predetermined potential at the start of data readout;
• and
• a bit line current supply circuit supplying a same current amount to the first and the second main bit lines during the data readout.

A data readout method of a nonvolatile semiconductor memory device having:

• a word line connected to control gates of memory cells in a row direction;
• a first bit line connected to drain sides of memory cells in a column direction;
• a reference word line connected to gates of reference cells in the row direction;
• a second bit line connected to a drain side of a reference cell;
• an amplifier for amplifying a potential difference between the first bit line and the second bit line;
• a precharge circuit for precharging the first and the second bit lines to a predetermined potential at the start of data readout;
• and
• a bit line current supply circuit for supplying a same current amount to the first and the second bit lines during the data readout;
• the method comprising, when data is read out, the steps of:
• selecting the memory cells by the word line to connect a memory cell of the plurality of memory cells to the first bit line;
• selecting the reference cells by the reference word line to connect a reference cell of the plurality of reference cells to the second bit line;
• and
• supplying a current of the same amount to both the first bit line and the second bit line.