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US 2003/0156220 A1Published application
Image processing apparatus
AssigneeSony Corporation
InventorAtsushi Narita
Life of this patent
Estimating the term…
Abstract
An image processing apparatus enabling alpha blending or other image processing during bit block transfer (bitblt), wherein the selector 52 selects one of the primitive data S143, the image data S12 and the image data S147a that are used for the host-local transfer, and outputs the data to the alpha blend circuit 53. According to the control signal S55, the alpha blend circuit 53 turns on or turns off alpha blending. The selector 54 selects either the image data S139 or the image data S53 and writes the data to the DRAM 147.
Claims15
An image processing apparatus comprising
- a first interface for inputting a first image data from a calculation processing circuit outside a semiconductor chip, and inputting a second image data from an external storage circuit outside the semiconductor chip,
- a semiconductor storage circuit,
- a selecting circuit for selecting and outputting one of the first image data, the second image data, and a third image data read from the semiconductor storage circuit,
- an image processing circuit for selecting and performing either processing the image data inputted from the selecting circuit to generate and output an image data, or outputting an image data inputted from the selecting circuit, and
- a second interface for outputting the image data from the image processing circuit to the semiconductor storage circuit;
- wherein the first interface, the semiconductor storage circuit, the selecting circuit, the image processing circuit, and the second interface are formed in the same semiconductor chip.
3 more elements
An image processing apparatus comprising
- an interface for inputting a first image data from a calculation processing circuit outside a semiconductor chip, and inputting a second image data from an external storage circuit outside the semiconductor chip,
- a semiconductor storage circuit,
- a first selecting circuit for selecting and outputting either the second image data or a third image data read from the semiconductor storage circuit,
- a second selecting circuit for selecting and outputting either the first image data, or the image data selected by the first selecting circuit,
- an image processing circuit for processing the image data inputted from the second selecting circuit and generating an image data, and
- a third selecting circuit for selecting and outputting either the image data generated by the image processing circuit, or the image data selected and outputted by the first selecting circuit;
- wherein the interface, the semiconductor storage circuit, the first selecting circuit, the second selecting circuit, the third selecting circuit, and the image processing circuit are formed in the same semiconductor chip.
4 more elements
An image processing apparatus comprising
- a calculation processing circuit,
- an external storage circuit, and
- a rendering circuit,
- wherein, the rendering circuit comprises a first interface for inputting a first image data from the calculation processing circuit, and inputting a second image data from the external storage circuit, a semiconductor storage circuit, a selecting circuit for selecting and outputting one of the first image data, the second image data, and a third image data read from the semiconductor storage circuit, an image processing circuit for selecting and performing either processing the image data inputted from the selecting circuit to generate and output an image data, or outputting an image data inputted from the selecting circuit, and a second interface for outputting the image data from the image processing circuit to the semiconductor storage circuit;
- wherein the first interface, the semiconductor storage circuit, the selecting circuit, the image processing circuit, and the second interface are formed in the same semiconductor chip.
2 more elements
An image processing apparatus comprising
- a calculation processing circuit,
- an external storage circuit, and
- a rendering circuit,
- wherein, the rendering circuit comprises an interface for inputting a first image data from the calculation processing circuit, and inputting a second image data from the external storage circuit, a semiconductor storage circuit, a first selecting circuit for selecting and outputting either the second image data, or a third image data read from the semiconductor storage circuit, a second selecting circuit for selecting and outputting either the first image data, or the image data selected by the first selecting circuit, an image processing circuit for processing the image data inputted from the second selecting circuit and generating an image data, and a third selecting circuit for selecting and outputting either the image data generated by the image processing circuit, or the image data selected and outputted by the first selecting circuit;
- wherein the interface, the semiconductor storage circuit, the first selecting circuit, the second selecting circuit, the third selecting circuit, and the image processing circuit are formed in the same semiconductor chip.
2 more elements
Dependencies are inferred from the claim text.