Signal processing apparatus for generating clocks phase-synchronized with input signal
AssigneeCanon Kabushiki Kaisha
InventorYukihiko Sakashita
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Abstract
An image signal processing apparatus has a clock generation circuit for generating a clock which is phase-synchronized with an input image signal, a sampling circuit for sampling the input image signal in response to the clock, a comparator circuit for comparing a plurality of samples output from the sampling circuit with each other, and a control circuit for controlling a phase of the clock by controlling the clock generating circuit in accordance with a comparison result by the compartor circuit.
Claims27
An image signal processing apparatus, comprising:
- clock generating means for generating a clock which is phase-synchronized with an input image signal;
- sampling means for sampling the input image signal in response to the clock;
- comparison means for comparing a plurality of samples output from said sampling means with each other;
- and
- control means for controlling a phase of the clock by controlling said clock generating means in accordance with a comparison result by said comparison means.
An image signal processing apparatus, comprising:
- clock generating means for generating a clock which is phase-synchronized with an input image signal;
- sampling means for sampling the input image signal in response to the clock generated by said clock generating means;
- mode switching means for switching among a plurality of modes including a first mode wherein said clock generating means generates a first clock having a first phase and said sampling means samples the input image signal in response to the first clock and a second mode wherein said clock generating means generates a second clock having a second phase different from the first phase and said sampling means samples the input image signal in response to the second clock;
- and
- control means for controlling a phase of the clock by controlling said clock generating means in accordance with an output of said sampling means obtained in the first mode and an output of said sampling means obtained in the second mode.
An image signal processing apparatus, comprising:
- clock generating means for generating a clock which is phase-synchronized with an input image signal;
- sampling means for sampling the input image signal in response to the clock generated by said clock generating means;
- mode switching means for switching among a plurality of modes wherein said clock generating means generates a plurality of clocks whose phases are different from each other by a predetermined amount;
- and
- control means for controlling a phase of the clock by controlling said clock generating means in accordance with each output of a plurality of said sampling means obtained in each of the plurality of modes.
An image signal processing method, comprising the steps of:
- generating a clock which is phase-synchronized with an input image signal;
- sampling the input image signal in response to the clock;
- comparing a plurality of samples generated in said sampling step with each other;
- and
- controlling a phase of the clock by controlling said clock generating step in accordance with a comparison result in said comparison step.
An image signal processing method comprising the steps of:
- generating a clock which is phase-synchronized with an input image signal;
- sampling the input image signal in response to the clock generated in said clock generating step;
- switching among a plurality of modes including a first mode wherein said clock generating step generates a first clock having a first phase and said sampling steps samples the input image signal in response to the first clock and a second mode wherein said clock generating step generates a second clock having a second phase different from the first phase and said sampling steps samples the input image signal in response to the second clock;
- and
- controlling a phase of the clock by controlling said clock generating step in accordance with an output of said sampling step obtained in the first mode and an output of said sampling step obtained in the second mode.
A computer readable storage medium storing program codes for realizing an image signal processing method, the program codes comprising the steps of:
- generating a clock which is phase-synchronized with an input image signal;
- sampling the input image signal in response to the clock;
- comparing a plurality of samples generated in said sampling step with each other;
- and
- controlling a phase of the clock by controlling said clock generating step in accordance with a comparison result in said comparison step.
A computer readable storage medium storing program codes for realizing an image signal processing method, the program codes comprising the steps of:
- generating a clock which is phase-synchronized with an input image signal;
- sampling the input image signal in response to the clock generated in said clock generating step;
- switching among a plurality of modes including a first mode wherein said clock generating step generates a first clock having a first phase and said sampling steps samples the input image signal in response to the first clock and a second mode wherein said clock generating step generates a second clock having a second phase different from the first phase and said sampling steps samples the input image signal in response to the second clock;
- and
- controlling a phase of the clock by controlling said clock generating step in accordance with an output of said sampling step obtained in the first mode and an output of said sampling step obtained in the second mode.
Dependencies are inferred from the claim text.