Scanning circuit and image sensor
AssigneeSeiko Instruments Inco.
InventorsMasahiro Yokomichi, Satoshi Machida, Yoshihiro Shibuya, Yukito Kawahara, Minoru Ariyama
Life of this patent
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Abstract
A scanning circuit has path switches connected between a plurality of data flip-flop circuits of the scanning circuit for sequentially reading an output signal in synchronism with a clock. A plurality of control signal lines select the path switches to arbitrarily skip reading of the flip-flop circuits that do not require the scanning circuit and always fix a potential of the skipped data flip-flop circuit. Only the arbitrary data is read, and in the case where unnecessary data exists, reading is skipped, to thereby increase the read rate.
Claims6
A scanning circuit comprising:
- a first scanning circuit that outputs a signal that controls an operation of an external circuit;
- and
- a second scanning circuit that outputs a signal that controls the operation of the external circuit or another external circuit,
- wherein the first scanning circuit has a reset circuit that receives a start signal that starts an operation of the scanning circuit and a mode changeover signal to output a signal, a flip flop circuit that receives the output of the reset circuit and a clock signal to output a signal of an output as the first scanning circuit and a signal that controls an internal circuit of the first scanning circuit, and a switch circuit that receives the signal that controls the internal circuit of the first scanning circuit and the mode changeover signal to output a signal that starts an operation of the second scanning circuit.
A scanning circuit comprising:
- a plurality of data flip flop circuits that sequentially read an output signal in synchronism with a clock;
- and
- a path switch connected between a data output terminal of one of the data flip flop circuits and a data input terminal of another data flip flop circuit,
- wherein at least one of the plurality of data flip flop circuits, which does not require the scanning circuit is arbitrarily skipped in reading so as to be adaptive to systems different in scanning order.
Dependencies are inferred from the claim text.