Circuit arrangement for pulse generation
AssigneeKoninklijke Philips Electronics N.V.
InventorRalf Beier
Life of this patent
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Abstract
The invention relates to a circuit arrangement for pulse generation, having a capacitor, to which a charging current and a discharging current may be supplied in succession. To generate the charging current and the discharging current, there are provided a current source, a first current mirror circuit and a second current mirror circuit complementary to the first current mirror circuit. The current mirror circuits each comprise a plurality of output transistors, which each constitute an output stage for the charging and discharging current, which is connected to a regulator, and for a circuit for controlling the tail current of a differential amplifier forming the regulator. A current output of the differential amplifier is connected to the output of the second current mirror circuit.
Claims4
A circuit arrangement for pulse generation, characterized in that
- a charging current and a discharging current may be supplied in succession to a capacitor (1), with a threshold value switch (3) connected to the capacitor (1) and a bistable circuit (4) connected to the threshold value switch (3), the output (12) of which bistable circuit (4) outputs a switching signal during supply of the charging current,
- a current source (51), a first current mirror circuit (23) and a second current mirror circuit (24) complementary to the first current mirror circuit (23) are provided to generate the charging current and the discharging current,
- the first current mirror circuit (23) comprises an input transistor (25) and three output transistors (26, 27, 28) connected with the gate electrodes thereof, wherein the first of the output transistors (26) comprises a larger area than the second and third output transistors (27, 28),
- the drain electrodes of the first output transistor (26) and an input transistor (32) of the second current mirror circuit are connected together,
- the drain electrodes of the second output transistor (27) of the first current mirror circuit (23) and an output transistor (34) of the second current mirror circuit (24) are connected together, to the capacitor and to an input of a regulator in the form of a differential amplifier (40),
- the third output transistor (28) of the first current mirror circuit (23) and a further output transistor (36) of the second current mirror circuit (24) are connected together to form an output stage and are connected to a circuit (45 to 50) for controlling the tail current of the differential amplifier (40) and
- a current output (42) of the differential amplifier (40) is connected to the drain electrode of the output transistor (34) of the second current mirror circuit (24).
A circuit arrangement as claimed in any one of the preceding claims, characterized in that the differential amplifier (40) takes the form of two source-coupled transistors (38, 39), wherein the switching signal may be supplied by the bistable circuit (4) to the drain electrode of a transistor (39) of the differential amplifier (40) and wherein a fifth current mirror circuit (41, 42) is provided in the output circuit of this transistor (39), the output of which fifth current mirror circuit (41, 42) is connected to the drain electrode of the output transistor (34) of the second current mirror circuit (24).
A circuit arrangement as claimed in any one of the preceding claims, characterized in that the output transistors (26, 27, 28, 34, 36) of the first and second current mirror circuits are each supplemented by a further transistor (29, 30, 31, 35, 37) in cascode connection.
Dependencies are inferred from the claim text.