Test method and test device for integrated circuits
AssigneeUltraTera Corporation, Taiwan, R.O.C.
InventorsJohnson Hsu, San-Pen Lin, Chin-Hoe Tan, Huan-Ping Su, Auger Horng, Hsien-Ta Chiu
Life of this patent
Estimating the term…
Loading patent…
AssigneeUltraTera Corporation, Taiwan, R.O.C.
InventorsJohnson Hsu, San-Pen Lin, Chin-Hoe Tan, Huan-Ping Su, Auger Horng, Hsien-Ta Chiu
Estimating the term…
A test method and a test device for integrated circuits are proposed. The test device includes: a test platform having a plurality of spaced-apart test tunnels; a test tray defined with board attach areas corresponding in position to the test tunnels, whereby a strip board having a plurality of semiconductor packages can be placed on a board attach area, and aligned with a corresponding test tunnel; and a control mechanism for gradually moving the test tray to perform tests for the semiconductor packages on the strip board. In operation of the test method, first, a plurality of strip boards having semiconductor packages are placed on the test tray, and each corresponds to a test tunnel of the test platform. Then, the test tray is gradually moved in a manner as to perform tests for all semiconductor packages on the strip board step by step.
A test method for integrated circuits, applied to a test device having a plurality of test tunnels that are properly spaced apart from each other;
A test device for integrated circuits, comprising:
Dependencies are inferred from the claim text.