Method of simultaneously making a pair of transistors with insulated grids having respectively a fine oxide and a thick oxide, and corresponding integrated circuit comprising such a pair of transistors
AssigneeSTMicroelectronics S.r.l.
InventorsLaurence Boissonnet, Dominique Golanski, Bruno Rauber, Andre Granier
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Abstract
Forming low-doped NLDD areas 17, 61 of the thin oxide second transistor T2 includes implanting a first dopant 16 having a first concentration and implanting a second dopant 22 having a second concentration lower than the first concentration. Forming low-doped areas NLDD 61 of the first, thick oxide transistor T1 includes only said implantation of the second dopant 22.
Claims5
A method of simultaneously fabricating a pair of insulated gate transistors, a first transistor (T1) of the pair having a thicker gate oxide layer than the second transistor (T2) of the pair, said method including, for each transistor, forming the gate oxide layer, forming the gate flanked by insulative lateral regions, forming high-doped drain and source regions, and forming low-doped source and drain areas extending under the insulative lateral regions between the high-doped drain and source regions and the channel region of the transistor, characterized in that forming source and drain areas (17, 61) of the second transistor (T2) includes implanting a first dopant (16) having a first concentration and implanting a second dopant (22) having a second concentration lower than the first concentration, and in that forming the source and drain areas (61) of the first transistor (T1) includes only implanting the second dopant (22).
An integrated circuit, characterized in that it includes at least one pair of insulated gate transistors (T1, T2) fabricated by the method defined in any preceding claim.
Dependencies are inferred from the claim text.