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US 2003/0155607 A1Published application
Semiconductor integrated circuit
AssigneeHitachi, Ltd.
InventorsYoshiaki Kamigaki, Shinichi Minami, Kozo Katayama, Masataka Kato
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AssigneeHitachi, Ltd.
InventorsYoshiaki Kamigaki, Shinichi Minami, Kozo Katayama, Masataka Kato
Estimating the term…
A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is formed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.
A semiconductor integrated circuit having nonvolatile memory cells each of which comprises one memory transistor, two switch transistors and two diffusion-layer lines, wherein said memory transistor includes a gate insulating film having discrete traps and a memory gate electrode connected to a word line, said two diffusion-layer lines constitute a source line and a bit line, and the switch gate electrodes of said two switch transistors are extended along said source line and said bit line.
A semiconductor integrated circuit having nonvolatile memory cells each of which comprises one memory transistor, two switch transistors and two transistor inversion-layer lines, wherein said memory transistor includes a gate insulating film having discrete traps and a memory gate electrode connected to a word line, said two transistor inversion-layer lines constitute a source line and a bit line, and said two switch transistors and said two transistor inversion-layer lines constituting said source line and said bit line share said memory gate electrode, respectively.
A semiconductor integrated circuit having nonvolatile memory cells each of which comprises one memory transistor, one switch transistor, one transistor inversion-layer line and one diffusion-layer line, wherein said one memory transistor includes a gate insulating film having discrete traps and a memory gate electrode connected to a word line, said one transistor inversion-layer line constitutes a source line, said one diffusion-layer line constitutes a bit line, and said one switch transistor and said one transistor inversion-layer line constituting said source line share said memory gate electrode, respectively.
A semiconductor integrated circuit having nonvolatile memory cells each of which comprises two memory transistors, one switch transistor and two diffusion-layer lines, wherein each of said memory transistors includes a gate insulating film having discrete traps and a memory gate electrode connected to a word line, said two diffusion-layer lines constitute a source line and a bit line, and the switch gate electrode of said one switch transistor is extended along said source line and said bit line.
Dependencies are inferred from the claim text.