Semiconductor device and complementary semiconductor device
AssigneeFujitsu Limited
InventorsMasashi Shima, Tetsuji Ueno, Yoshiki Sakuma, Shunji Nakamura
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Abstract
A semiconductor device includes a channel layer, a gate electrode formed on the channel layer, a p-type source region formed on a first side of the channel layer, and a p-type drain region formed on a second side of the channel layer. A heavy-hole band and a light-hole band are separated by compressive strain applied isotropically in an in-plane direction in the channel layer. A channel direction connecting the p-type source and drain regions is set substantially to a direction to maximize hole mobility in the channel layer.
Claims16
A semiconductor device comprising:
- a channel layer;
- a gate electrode formed on said channel layer;
- a p-type source region formed on a first side of said channel layer;
- and
- a p-type drain region formed on a second side of said channel layer,
- wherein:
- a heavy-hole band and a light-hole band are separated by compressive strain applied isotropically in an in-plane direction in said channel layer;
- and
- a channel direction connecting said p-type source and drain regions is set substantially to a direction to maximize hole mobility in said channel layer.
A complementary semiconductor device comprising:
- a Si substrate whose main surface is substantially a (001) crystal surface;
- a p-channel field-effect transistor (FET) formed in a first region of said Si substrate;
- and
- an n-channel field-effect transistor (FET) formed in a second region of said Si substrate,
- wherein:
- said p-channel FET comprises:
- a p-channel region formed of a mixed crystal layer including at least Si and Ge and storing compressive strain, the mixed crystal layer grown epitaxially in the first region on said Si substrate;
- a first gate electrode formed on said p-channel region;
- a p-type first diffusion region formed on a first side of said p-channel region;
- and
- a p-type second diffusion region formed on a second side of said p-channel region;
- said n-channel FET comprises:
- an n-channel region formed of a Si layer grown epitaxially in the second region on said Si substrate;
- a second gate electrode formed on said n-channel region;
- an n-type third diffusion region formed on a first side of said n-channel region;
- and
- an n-type fourth diffusion region formed on a second side of said n-channel region;
- and
- a channel direction connecting said first and second diffusion regions is set to a direction deviating from a <110> direction in said p-channel FET.
Dependencies are inferred from the claim text.