Process for producing semiconductor article using graded epitaxial growth
AssigneeMassachusetts Institute of Technology
InventorsZhi-Yuan Cheng, Eugene A. Fitzgerald, Dimitri A. Antoniadis, Judy L. Hoyt
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AssigneeMassachusetts Institute of Technology
InventorsZhi-Yuan Cheng, Eugene A. Fitzgerald, Dimitri A. Antoniadis, Judy L. Hoyt
Estimating the term…
A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1−xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1−yGey layer, a thin strained Si1−zGez layer and another relaxed Si1−yGey layer. Hydrogen ions are then introduced into the strained SizGez layer. The relaxed Si1−yGey layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the strained Si layer, such that the second relaxed Si1−yGey layer remains on the second substrate. In another exemplary embodiment, a graded Si1−xGex is deposited on a first silicon substrate, where the Ge concentration x is increased from 0 to 1. Then a relaxed GaAs layer is deposited on the relaxed Ge buffer. As the lattice constant of GaAs is close to that of Ge, GaAs has high quality with limited dislocation defects. Hydrogen ions are introduced into the relaxed GaAs layer at the selected depth. The relaxed GaAs layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the hydrogen ion rich layer, such that the upper portion of relaxed GaAs layer remains on the second substrate.
A process of forming a semiconductor structure with a relaxed Si1−yGey layer, comprising:
A process of forming a semiconductor layer, comprising:
A process of forming a semiconductor structure with a relaxed Si1−zGez layer, comprising:
A process of forming a semiconductor layer, comprising:
A semiconductor structure comprising:
A semiconductor structure comprising:
Dependencies are inferred from the claim text.